Message ID | 1690948281-2143-3-git-send-email-quic_krichai@quicinc.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Krzysztof WilczyĆski |
Headers | show |
Series | PCI: endpoint: add D-state change notifier support | expand |
Hi Krishna, kernel test robot noticed the following build errors: [auto build test ERROR on pci/next] [also build test ERROR on pci/for-linus linus/master v6.5-rc4 next-20230803] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Krishna-chaitanya-chundru/PCI-endpoint-Add-D-state-change-notifier-support/20230802-115309 base: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git next patch link: https://lore.kernel.org/r/1690948281-2143-3-git-send-email-quic_krichai%40quicinc.com patch subject: [PATCH v5 2/4] PCI: qcom-ep: Add support for D-state change notification config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20230803/202308031857.u3v2s0bm-lkp@intel.com/config) compiler: gcc-12 (Debian 12.2.0-14) 12.2.0 reproduce: (https://download.01.org/0day-ci/archive/20230803/202308031857.u3v2s0bm-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202308031857.u3v2s0bm-lkp@intel.com/ All errors (new ones prefixed by >>): drivers/pci/controller/dwc/pcie-qcom-ep.c: In function 'qcom_pcie_ep_global_irq_thread': >> drivers/pci/controller/dwc/pcie-qcom-ep.c:597:17: error: implicit declaration of function 'pci_epc_dstate_notify'; did you mean 'pci_epc_bme_notify'? [-Werror=implicit-function-declaration] 597 | pci_epc_dstate_notify(pci->ep.epc, state); | ^~~~~~~~~~~~~~~~~~~~~ | pci_epc_bme_notify cc1: some warnings being treated as errors vim +597 drivers/pci/controller/dwc/pcie-qcom-ep.c 555 556 /* TODO: Notify clients about PCIe state change */ 557 static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) 558 { 559 struct qcom_pcie_ep *pcie_ep = data; 560 struct dw_pcie *pci = &pcie_ep->pci; 561 struct device *dev = pci->dev; 562 u32 status = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_STATUS); 563 u32 mask = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_MASK); 564 pci_power_t state; 565 u32 dstate, val; 566 567 writel_relaxed(status, pcie_ep->parf + PARF_INT_ALL_CLEAR); 568 status &= mask; 569 570 if (FIELD_GET(PARF_INT_ALL_LINK_DOWN, status)) { 571 dev_dbg(dev, "Received Linkdown event\n"); 572 pcie_ep->link_status = QCOM_PCIE_EP_LINK_DOWN; 573 pci_epc_linkdown(pci->ep.epc); 574 } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { 575 dev_dbg(dev, "Received BME event. Link is enabled!\n"); 576 pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED; 577 pci_epc_bme_notify(pci->ep.epc); 578 } else if (FIELD_GET(PARF_INT_ALL_PM_TURNOFF, status)) { 579 dev_dbg(dev, "Received PM Turn-off event! Entering L23\n"); 580 val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); 581 val |= PARF_PM_CTRL_READY_ENTR_L23; 582 writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL); 583 } else if (FIELD_GET(PARF_INT_ALL_DSTATE_CHANGE, status)) { 584 dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) & 585 DBI_CON_STATUS_POWER_STATE_MASK; 586 dev_dbg(dev, "Received D%d state event\n", dstate); 587 state = dstate; 588 if (dstate == 3) { 589 val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); 590 val |= PARF_PM_CTRL_REQ_EXIT_L1; 591 writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL); 592 593 state = PCI_D3hot; 594 if (gpiod_get_value(pcie_ep->reset)) 595 state = PCI_D3cold; 596 } > 597 pci_epc_dstate_notify(pci->ep.epc, state); 598 } else if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) { 599 dev_dbg(dev, "Received Linkup event. Enumeration complete!\n"); 600 dw_pcie_ep_linkup(&pci->ep); 601 pcie_ep->link_status = QCOM_PCIE_EP_LINK_UP; 602 } else { 603 dev_dbg(dev, "Received unknown event: %d\n", status); 604 } 605 606 return IRQ_HANDLED; 607 } 608
diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 0fe7f06..22545ff 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -561,6 +561,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) struct device *dev = pci->dev; u32 status = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_STATUS); u32 mask = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_MASK); + pci_power_t state; u32 dstate, val; writel_relaxed(status, pcie_ep->parf + PARF_INT_ALL_CLEAR); @@ -583,11 +584,17 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) & DBI_CON_STATUS_POWER_STATE_MASK; dev_dbg(dev, "Received D%d state event\n", dstate); + state = dstate; if (dstate == 3) { val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); val |= PARF_PM_CTRL_REQ_EXIT_L1; writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL); + + state = PCI_D3hot; + if (gpiod_get_value(pcie_ep->reset)) + state = PCI_D3cold; } + pci_epc_dstate_notify(pci->ep.epc, state); } else if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) { dev_dbg(dev, "Received Linkup event. Enumeration complete!\n"); dw_pcie_ep_linkup(&pci->ep);