diff mbox series

[v3,4/5] PCI: epf-mhi: Add support for SA8775P

Message ID 1697715430-30820-5-git-send-email-quic_msarkar@quicinc.com (mailing list archive)
State Superseded
Headers show
Series arm64: qcom: sa8775p: add support for EP PCIe | expand

Commit Message

Mrinmay Sarkar Oct. 19, 2023, 11:37 a.m. UTC
Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
SA8775P has the PID (0x0306) and supports HDMA. Currently, it has
no fixed PCI class, so it is being advertised as "PCI_CLASS_OTHERS".

Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
---
 drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Manivannan Sadhasivam Oct. 25, 2023, 7:56 a.m. UTC | #1
On Thu, Oct 19, 2023 at 05:07:09PM +0530, Mrinmay Sarkar wrote:
> Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
> SA8775P has the PID (0x0306) and supports HDMA. Currently, it has

Is the PID fixed? I thought you just want to reuse the SDXxx PID in the
meantime.

- Mani

> no fixed PCI class, so it is being advertised as "PCI_CLASS_OTHERS".
> 
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
> ---
>  drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> index b7b9d3e..4487260 100644
> --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c
> +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> @@ -114,6 +114,22 @@ static const struct pci_epf_mhi_ep_info sm8450_info = {
>  	.flags = MHI_EPF_USE_DMA,
>  };
>  
> +static struct pci_epf_header sa8775p_header = {
> +	.vendorid = PCI_VENDOR_ID_QCOM,
> +	.deviceid = 0x0306,
> +	.baseclass_code = PCI_CLASS_OTHERS,
> +	.interrupt_pin = PCI_INTERRUPT_INTA,
> +};
> +
> +static const struct pci_epf_mhi_ep_info sa8775p_info = {
> +	.config = &mhi_v1_config,
> +	.epf_header = &sa8775p_header,
> +	.bar_num = BAR_0,
> +	.epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32,
> +	.msi_count = 32,
> +	.mru = 0x8000,
> +};
> +
>  struct pci_epf_mhi {
>  	const struct pci_epc_features *epc_features;
>  	const struct pci_epf_mhi_ep_info *info;
> @@ -677,6 +693,7 @@ static int pci_epf_mhi_probe(struct pci_epf *epf,
>  }
>  
>  static const struct pci_epf_device_id pci_epf_mhi_ids[] = {
> +	{ .name = "sa8775p", .driver_data = (kernel_ulong_t)&sa8775p_info },
>  	{ .name = "sdx55", .driver_data = (kernel_ulong_t)&sdx55_info },
>  	{ .name = "sm8450", .driver_data = (kernel_ulong_t)&sm8450_info },
>  	{},
> -- 
> 2.7.4
>
Mrinmay Sarkar Oct. 26, 2023, 5:30 a.m. UTC | #2
On 10/25/2023 1:26 PM, Manivannan Sadhasivam wrote:
> On Thu, Oct 19, 2023 at 05:07:09PM +0530, Mrinmay Sarkar wrote:
>> Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
>> SA8775P has the PID (0x0306) and supports HDMA. Currently, it has
> Is the PID fixed? I thought you just want to reuse the SDXxx PID in the
> meantime.
>
> - Mani

The PID for SA8775p EP is not decided yet. So using 0x0306 PID meantime.

--Mrinmay

>> no fixed PCI class, so it is being advertised as "PCI_CLASS_OTHERS".
>>
>> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
>> ---
>>   drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 +++++++++++++++++
>>   1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c
>> index b7b9d3e..4487260 100644
>> --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c
>> +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c
>> @@ -114,6 +114,22 @@ static const struct pci_epf_mhi_ep_info sm8450_info = {
>>   	.flags = MHI_EPF_USE_DMA,
>>   };
>>   
>> +static struct pci_epf_header sa8775p_header = {
>> +	.vendorid = PCI_VENDOR_ID_QCOM,
>> +	.deviceid = 0x0306,
>> +	.baseclass_code = PCI_CLASS_OTHERS,
>> +	.interrupt_pin = PCI_INTERRUPT_INTA,
>> +};
>> +
>> +static const struct pci_epf_mhi_ep_info sa8775p_info = {
>> +	.config = &mhi_v1_config,
>> +	.epf_header = &sa8775p_header,
>> +	.bar_num = BAR_0,
>> +	.epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32,
>> +	.msi_count = 32,
>> +	.mru = 0x8000,
>> +};
>> +
>>   struct pci_epf_mhi {
>>   	const struct pci_epc_features *epc_features;
>>   	const struct pci_epf_mhi_ep_info *info;
>> @@ -677,6 +693,7 @@ static int pci_epf_mhi_probe(struct pci_epf *epf,
>>   }
>>   
>>   static const struct pci_epf_device_id pci_epf_mhi_ids[] = {
>> +	{ .name = "sa8775p", .driver_data = (kernel_ulong_t)&sa8775p_info },
>>   	{ .name = "sdx55", .driver_data = (kernel_ulong_t)&sdx55_info },
>>   	{ .name = "sm8450", .driver_data = (kernel_ulong_t)&sm8450_info },
>>   	{},
>> -- 
>> 2.7.4
>>
Manivannan Sadhasivam Oct. 26, 2023, 6:11 a.m. UTC | #3
On Thu, Oct 26, 2023 at 11:00:29AM +0530, Mrinmay Sarkar wrote:
> 
> On 10/25/2023 1:26 PM, Manivannan Sadhasivam wrote:
> > On Thu, Oct 19, 2023 at 05:07:09PM +0530, Mrinmay Sarkar wrote:
> > > Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
> > > SA8775P has the PID (0x0306) and supports HDMA. Currently, it has
> > Is the PID fixed? I thought you just want to reuse the SDXxx PID in the
> > meantime.
> > 
> > - Mani
> 
> The PID for SA8775p EP is not decided yet. So using 0x0306 PID meantime.
> 

Okay, then please mention that explicitly in the commit message.

- Mani

> --Mrinmay
> 
> > > no fixed PCI class, so it is being advertised as "PCI_CLASS_OTHERS".
> > > 
> > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
> > > ---
> > >   drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 +++++++++++++++++
> > >   1 file changed, 17 insertions(+)
> > > 
> > > diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> > > index b7b9d3e..4487260 100644
> > > --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c
> > > +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> > > @@ -114,6 +114,22 @@ static const struct pci_epf_mhi_ep_info sm8450_info = {
> > >   	.flags = MHI_EPF_USE_DMA,
> > >   };
> > > +static struct pci_epf_header sa8775p_header = {
> > > +	.vendorid = PCI_VENDOR_ID_QCOM,
> > > +	.deviceid = 0x0306,
> > > +	.baseclass_code = PCI_CLASS_OTHERS,
> > > +	.interrupt_pin = PCI_INTERRUPT_INTA,
> > > +};
> > > +
> > > +static const struct pci_epf_mhi_ep_info sa8775p_info = {
> > > +	.config = &mhi_v1_config,
> > > +	.epf_header = &sa8775p_header,
> > > +	.bar_num = BAR_0,
> > > +	.epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32,
> > > +	.msi_count = 32,
> > > +	.mru = 0x8000,
> > > +};
> > > +
> > >   struct pci_epf_mhi {
> > >   	const struct pci_epc_features *epc_features;
> > >   	const struct pci_epf_mhi_ep_info *info;
> > > @@ -677,6 +693,7 @@ static int pci_epf_mhi_probe(struct pci_epf *epf,
> > >   }
> > >   static const struct pci_epf_device_id pci_epf_mhi_ids[] = {
> > > +	{ .name = "sa8775p", .driver_data = (kernel_ulong_t)&sa8775p_info },
> > >   	{ .name = "sdx55", .driver_data = (kernel_ulong_t)&sdx55_info },
> > >   	{ .name = "sm8450", .driver_data = (kernel_ulong_t)&sm8450_info },
> > >   	{},
> > > -- 
> > > 2.7.4
> > > 
>
Konrad Dybcio Oct. 26, 2023, 11:10 a.m. UTC | #4
On 10/26/23 07:30, Mrinmay Sarkar wrote:
> 
> On 10/25/2023 1:26 PM, Manivannan Sadhasivam wrote:
>> On Thu, Oct 19, 2023 at 05:07:09PM +0530, Mrinmay Sarkar wrote:
>>> Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
>>> SA8775P has the PID (0x0306) and supports HDMA. Currently, it has
>> Is the PID fixed? I thought you just want to reuse the SDXxx PID in the
>> meantime.
>>
>> - Mani
> 
> The PID for SA8775p EP is not decided yet. So using 0x0306 PID meantime.
If it's not decided, why should it go upstream then? Would that
not break the hosts' expectations when the EP device is updated?

Konrad
Mrinmay Sarkar Oct. 26, 2023, 11:34 a.m. UTC | #5
On 10/26/2023 4:40 PM, Konrad Dybcio wrote:
>
>
> On 10/26/23 07:30, Mrinmay Sarkar wrote:
>>
>> On 10/25/2023 1:26 PM, Manivannan Sadhasivam wrote:
>>> On Thu, Oct 19, 2023 at 05:07:09PM +0530, Mrinmay Sarkar wrote:
>>>> Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
>>>> SA8775P has the PID (0x0306) and supports HDMA. Currently, it has
>>> Is the PID fixed? I thought you just want to reuse the SDXxx PID in the
>>> meantime.
>>>
>>> - Mani
>>
>> The PID for SA8775p EP is not decided yet. So using 0x0306 PID meantime.
> If it's not decided, why should it go upstream then? Would that
> not break the hosts' expectations when the EP device is updated?
>
> Konrad

I don't think it will break the host's functionality. In host side as 
well we are reusing same 0x0306 for SA8775p

--Mrinmay
diff mbox series

Patch

diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c
index b7b9d3e..4487260 100644
--- a/drivers/pci/endpoint/functions/pci-epf-mhi.c
+++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c
@@ -114,6 +114,22 @@  static const struct pci_epf_mhi_ep_info sm8450_info = {
 	.flags = MHI_EPF_USE_DMA,
 };
 
+static struct pci_epf_header sa8775p_header = {
+	.vendorid = PCI_VENDOR_ID_QCOM,
+	.deviceid = 0x0306,
+	.baseclass_code = PCI_CLASS_OTHERS,
+	.interrupt_pin = PCI_INTERRUPT_INTA,
+};
+
+static const struct pci_epf_mhi_ep_info sa8775p_info = {
+	.config = &mhi_v1_config,
+	.epf_header = &sa8775p_header,
+	.bar_num = BAR_0,
+	.epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32,
+	.msi_count = 32,
+	.mru = 0x8000,
+};
+
 struct pci_epf_mhi {
 	const struct pci_epc_features *epc_features;
 	const struct pci_epf_mhi_ep_info *info;
@@ -677,6 +693,7 @@  static int pci_epf_mhi_probe(struct pci_epf *epf,
 }
 
 static const struct pci_epf_device_id pci_epf_mhi_ids[] = {
+	{ .name = "sa8775p", .driver_data = (kernel_ulong_t)&sa8775p_info },
 	{ .name = "sdx55", .driver_data = (kernel_ulong_t)&sdx55_info },
 	{ .name = "sm8450", .driver_data = (kernel_ulong_t)&sm8450_info },
 	{},