| Message ID | 1727148464-14341-3-git-send-email-hongxing.zhu@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | A bunch of changes to refine i.MX PCIe driver | expand |
On Tue, Sep 24, 2024 at 11:27:37AM +0800, Richard Zhu wrote: > Add "ref" clock to enable reference clock. > > If use external clock, ref clock should point to external reference. > > If use internal clock, CREF_EN in LAST_TO_REG controls reference output, > which implement in drivers/clk/imx/clk-imx95-blk-ctl.c. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> > --- > drivers/pci/controller/dwc/pci-imx6.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 0dbc333adcff..2aa02674c817 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -1480,6 +1480,7 @@ static const char * const imx8mm_clks[] = {"pcie_bus", "pcie", "pcie_aux"}; > static const char * const imx8mq_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux"}; > static const char * const imx6sx_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_inbound_axi"}; > static const char * const imx8q_clks[] = {"mstr", "slv", "dbi"}; > +static const char * const imx95_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux", "ref"}; > > static const struct imx_pcie_drvdata drvdata[] = { > [IMX6Q] = { > @@ -1593,8 +1594,8 @@ static const struct imx_pcie_drvdata drvdata[] = { > [IMX95] = { > .variant = IMX95, > .flags = IMX_PCIE_FLAG_HAS_SERDES, > - .clk_names = imx8mq_clks, > - .clks_cnt = ARRAY_SIZE(imx8mq_clks), > + .clk_names = imx95_clks, > + .clks_cnt = ARRAY_SIZE(imx95_clks), > .ltssm_off = IMX95_PE0_GEN_CTRL_3, > .ltssm_mask = IMX95_PCIE_LTSSM_EN, > .mode_off[0] = IMX95_PE0_GEN_CTRL_1, > -- > 2.37.1 >
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 0dbc333adcff..2aa02674c817 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1480,6 +1480,7 @@ static const char * const imx8mm_clks[] = {"pcie_bus", "pcie", "pcie_aux"}; static const char * const imx8mq_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux"}; static const char * const imx6sx_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_inbound_axi"}; static const char * const imx8q_clks[] = {"mstr", "slv", "dbi"}; +static const char * const imx95_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux", "ref"}; static const struct imx_pcie_drvdata drvdata[] = { [IMX6Q] = { @@ -1593,8 +1594,8 @@ static const struct imx_pcie_drvdata drvdata[] = { [IMX95] = { .variant = IMX95, .flags = IMX_PCIE_FLAG_HAS_SERDES, - .clk_names = imx8mq_clks, - .clks_cnt = ARRAY_SIZE(imx8mq_clks), + .clk_names = imx95_clks, + .clks_cnt = ARRAY_SIZE(imx95_clks), .ltssm_off = IMX95_PE0_GEN_CTRL_3, .ltssm_mask = IMX95_PCIE_LTSSM_EN, .mode_off[0] = IMX95_PE0_GEN_CTRL_1,
Add "ref" clock to enable reference clock. If use external clock, ref clock should point to external reference. If use internal clock, CREF_EN in LAST_TO_REG controls reference output, which implement in drivers/clk/imx/clk-imx95-blk-ctl.c. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)