| Message ID | 20180813181939.105655.50410.stgit@tak.stowe (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | Augment device matching its upstream Root Port's MPS logic | expand |
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 611adcd..b285786 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1730,6 +1730,10 @@ static void pci_configure_mps(struct pci_dev *dev) if (!pci_is_pcie(dev) || !bridge || !pci_is_pcie(bridge)) return; + /* MPS and MRRS fields are of type 'RsvdP' for VFs, short-circuit out */ + if (dev->is_virtfn) + return; + mps = pcie_get_mps(dev); p_mps = pcie_get_mps(bridge);
Section 9.3.5.4 "Device Control Register" specifically shows both Max_Payload_Size (MPS) and Max_Read_request_Size (MRRS) to be 'RsvdP' for VFs in Table 9-16 [1]. Just prior to the table it states: "PF and VF functionality is defined in Section 7.5.3.4 except where noted in Table 9-16. For VF fields marked 'RsvdP', the PF setting applies to the VF." All of which implies that with respect to Max_Payload_Size Supported (MPSS), MPS, and MRRS values, we should not be paying any attention to the VF's fields, but rather only to the PF's. Only looking at the PF's fields also logically makes sense as it's the sole physical interface to the PCIe bus. [1] PCI Express Base Specification, Revision 4.0 Version 1.0 (2017). Link: https://bugzilla.kernel.org/show_bug.cgi?id=200527 Cc: Keith Busch <keith.busch@intel.com> Cc: Sinan Kaya <okaya@kernel.org> Cc: Dongdong Liu <liudongdong3@huawei.com> Cc: Jon Mason <jdmason@kudzu.us> Fixes: 27d868b5e6cf ("PCI: Set MPS to match upstream bridge") Cc: stable@vger.kernel.org # 4.3+ Signed-off-by: Myron Stowe <myron.stowe@redhat.com> --- drivers/pci/probe.c | 4 ++++ 1 file changed, 4 insertions(+)