@@ -109,7 +109,8 @@ EXPORT_SYMBOL_GPL(adf_reset_sbr);
void adf_reset_flr(struct adf_accel_dev *accel_dev)
{
- pcie_flr(accel_to_pci_dev(accel_dev));
+ pci_reset_function(accel_to_pci_dev(accel_dev), PCI_RESET_FLR,
+ false, true);
}
EXPORT_SYMBOL_GPL(adf_reset_flr);
@@ -14077,7 +14077,7 @@ static int init_chip(struct hfi1_devdata *dd)
dd_dev_info(dd, "Resetting CSRs with FLR\n");
/* do the FLR, the DC reset will remain */
- pcie_flr(dd->pcidev);
+ pci_reset_function(dd->pcidev, PCI_RESET_FLR, false, true);
/* restore command and BARs */
ret = restore_pci_variables(dd);
@@ -14089,7 +14089,8 @@ static int init_chip(struct hfi1_devdata *dd)
if (is_ax(dd)) {
dd_dev_info(dd, "Resetting CSRs with FLR\n");
- pcie_flr(dd->pcidev);
+ pci_reset_function(dd->pcidev, PCI_RESET_FLR, false,
+ true);
ret = restore_pci_variables(dd);
if (ret) {
dd_dev_err(dd, "%s: Could not restore PCI variables\n",
@@ -438,7 +438,8 @@ static void octeon_pci_flr(struct octeon_device *oct)
pci_write_config_word(oct->pci_dev, PCI_COMMAND,
PCI_COMMAND_INTX_DISABLE);
- pcie_flr(oct->pci_dev);
+ pci_reset_function(oct->pci_dev, PCI_RESET_FUNCTION,
+ false, true);
pci_cfg_access_unlock(oct->pci_dev);
@@ -7539,7 +7539,8 @@ static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
status_reg & PCI_STATUS_REC_MASTER_ABORT)
- pcie_flr(vfdev);
+ pci_reset_function(vfdev, PCI_RESET_FLR, false
+ true);
}
}
@@ -11046,7 +11047,8 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
* VFLR. Just clean up the AER in that case.
*/
if (vfdev) {
- pcie_flr(vfdev);
+ pci_reset_function(vfdev, PCI_RESET_FUNCTION, false,
+ true);
/* Free device reference count */
pci_dev_put(vfdev);
}
@@ -38,6 +38,7 @@ int pci_bridge_secondary_bus_reset(struct pci_dev *dev);
int __pci_reset_function_locked(struct pci_dev *dev, u32 reset_type);
int pci_reset_function_locked(struct pci_dev *dev, u32 reset_type,
bool saverestore);
+int pcie_flr(struct pci_dev *dev);
/**
* struct pci_platform_pm_ops - Firmware PM callbacks
@@ -1164,7 +1164,6 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev,
enum pcie_link_width *width);
void pcie_print_link_status(struct pci_dev *dev);
bool pcie_has_flr(struct pci_dev *dev);
-int pcie_flr(struct pci_dev *dev);
int pci_reset_function(struct pci_dev *dev, u32 reset_type, bool saverestore,
bool locked);
int pci_try_reset_function(struct pci_dev *dev, u32 reset_type);
Now that we have a unified API for device reset, let's eliminate one duplication by hiding pcie_flr(). Signed-off-by: Sinan Kaya <okaya@kernel.org> --- drivers/crypto/qat/qat_common/adf_aer.c | 3 ++- drivers/infiniband/hw/hfi1/chip.c | 5 +++-- drivers/net/ethernet/cavium/liquidio/lio_vf_main.c | 3 ++- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 6 ++++-- drivers/pci/pci.h | 1 + include/linux/pci.h | 1 - 6 files changed, 12 insertions(+), 7 deletions(-)