diff mbox series

[v5,11/11] PCI: Hide pcie_flr() in favor of pci_reset_function()

Message ID 20181011045008.32212-11-okaya@kernel.org (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show
Series [v5,01/11] PCI: Expose reset_type to users of __pci_reset_function_locked() | expand

Commit Message

Sinan Kaya Oct. 11, 2018, 4:50 a.m. UTC
Now that we have a unified API for device reset, let's eliminate
one duplication by hiding pcie_flr().

Signed-off-by: Sinan Kaya <okaya@kernel.org>
---
 drivers/crypto/qat/qat_common/adf_aer.c            | 3 ++-
 drivers/infiniband/hw/hfi1/chip.c                  | 5 +++--
 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c | 3 ++-
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c      | 6 ++++--
 drivers/pci/pci.h                                  | 1 +
 include/linux/pci.h                                | 1 -
 6 files changed, 12 insertions(+), 7 deletions(-)

Comments

Sinan Kaya Oct. 11, 2018, 3:41 p.m. UTC | #1
On 10/11/2018 12:50 AM, Sinan Kaya wrote:
> Now that we have a unified API for device reset, let's eliminate
> one duplication by hiding pcie_flr().
> 
> Signed-off-by: Sinan Kaya<okaya@kernel.org>

This patch might have gone too far. I'm willing to drop it.
diff mbox series

Patch

diff --git a/drivers/crypto/qat/qat_common/adf_aer.c b/drivers/crypto/qat/qat_common/adf_aer.c
index 9225d060e18f..9326685dd89f 100644
--- a/drivers/crypto/qat/qat_common/adf_aer.c
+++ b/drivers/crypto/qat/qat_common/adf_aer.c
@@ -109,7 +109,8 @@  EXPORT_SYMBOL_GPL(adf_reset_sbr);
 
 void adf_reset_flr(struct adf_accel_dev *accel_dev)
 {
-	pcie_flr(accel_to_pci_dev(accel_dev));
+	pci_reset_function(accel_to_pci_dev(accel_dev), PCI_RESET_FLR,
+			   false, true);
 }
 EXPORT_SYMBOL_GPL(adf_reset_flr);
 
diff --git a/drivers/infiniband/hw/hfi1/chip.c b/drivers/infiniband/hw/hfi1/chip.c
index e1668bcc2d13..12bc5ef81e12 100644
--- a/drivers/infiniband/hw/hfi1/chip.c
+++ b/drivers/infiniband/hw/hfi1/chip.c
@@ -14077,7 +14077,7 @@  static int init_chip(struct hfi1_devdata *dd)
 		dd_dev_info(dd, "Resetting CSRs with FLR\n");
 
 		/* do the FLR, the DC reset will remain */
-		pcie_flr(dd->pcidev);
+		pci_reset_function(dd->pcidev, PCI_RESET_FLR, false, true);
 
 		/* restore command and BARs */
 		ret = restore_pci_variables(dd);
@@ -14089,7 +14089,8 @@  static int init_chip(struct hfi1_devdata *dd)
 
 		if (is_ax(dd)) {
 			dd_dev_info(dd, "Resetting CSRs with FLR\n");
-			pcie_flr(dd->pcidev);
+			pci_reset_function(dd->pcidev, PCI_RESET_FLR, false,
+					   true);
 			ret = restore_pci_variables(dd);
 			if (ret) {
 				dd_dev_err(dd, "%s: Could not restore PCI variables\n",
diff --git a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c
index b77835724dc8..6af086337359 100644
--- a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c
+++ b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c
@@ -438,7 +438,8 @@  static void octeon_pci_flr(struct octeon_device *oct)
 	pci_write_config_word(oct->pci_dev, PCI_COMMAND,
 			      PCI_COMMAND_INTX_DISABLE);
 
-	pcie_flr(oct->pci_dev);
+	pci_reset_function(oct->pci_dev, PCI_RESET_FUNCTION,
+			   false, true);
 
 	pci_cfg_access_unlock(oct->pci_dev);
 
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index f27d73a7bf16..6345c2c11c62 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -7539,7 +7539,8 @@  static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
 		pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
 		if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
 		    status_reg & PCI_STATUS_REC_MASTER_ABORT)
-			pcie_flr(vfdev);
+			pci_reset_function(vfdev, PCI_RESET_FLR, false
+					   true);
 	}
 }
 
@@ -11046,7 +11047,8 @@  static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
 		 * VFLR.  Just clean up the AER in that case.
 		 */
 		if (vfdev) {
-			pcie_flr(vfdev);
+			pci_reset_function(vfdev, PCI_RESET_FUNCTION, false,
+					   true);
 			/* Free device reference count */
 			pci_dev_put(vfdev);
 		}
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 737fdc36fe36..c1dc92b1cc1e 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -38,6 +38,7 @@  int pci_bridge_secondary_bus_reset(struct pci_dev *dev);
 int __pci_reset_function_locked(struct pci_dev *dev, u32 reset_type);
 int pci_reset_function_locked(struct pci_dev *dev, u32 reset_type,
 			      bool saverestore);
+int pcie_flr(struct pci_dev *dev);
 
 /**
  * struct pci_platform_pm_ops - Firmware PM callbacks
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 95efffd09690..acaf115841cc 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1164,7 +1164,6 @@  u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev,
 			     enum pcie_link_width *width);
 void pcie_print_link_status(struct pci_dev *dev);
 bool pcie_has_flr(struct pci_dev *dev);
-int pcie_flr(struct pci_dev *dev);
 int pci_reset_function(struct pci_dev *dev, u32 reset_type, bool saverestore,
 		       bool locked);
 int pci_try_reset_function(struct pci_dev *dev, u32 reset_type);