Message ID | 20190107134510.32494-2-koen.vandeputte@ncentric.com (mailing list archive) |
---|---|
State | New, archived |
Delegated to: | Bjorn Helgaas |
Headers | show |
Series | [v2,1/2] arm: cns3xxx: fix writing to wrong PCI registers after alignment | expand |
Koen Vandeputte <koen.vandeputte@ncentric.com> writes: > commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors") > reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(), > which preserved the property of only doing 32-bit reads. > > It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(), > so it changed writes from always being 32 bits to being the actual size, > which works just fine. > > Due to: > - The documentation does not mention that only 32 bit access is allowed. > - Writes are already executed using the actual size > - Extensive testing shows that 8b, 16b and 32b reads work as intended > > It makes perfectly sense to also swap 32 bit reading in favor of actual size. Acked-by: Krzysztof Halasa <khalasa@piap.pl> > --- a/arch/arm/mach-cns3xxx/pcie.c > +++ b/arch/arm/mach-cns3xxx/pcie.c > @@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn, > u32 mask = (0x1ull << (size * 8)) - 1; > int shift = (where % 4) * 8; > > - ret = pci_generic_config_read32(bus, devfn, where, size, val); > + ret = pci_generic_config_read(bus, devfn, where, size, val); > > if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn && > (where & 0xffc) == PCI_CLASS_REVISION)
Koen Vandeputte <koen.vandeputte@ncentric.com> writes: > commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors") > reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(), > which preserved the property of only doing 32-bit reads. > > It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(), > so it changed writes from always being 32 bits to being the actual size, > which works just fine. > > Due to: > - The documentation does not mention that only 32 bit access is allowed. > - Writes are already executed using the actual size > - Extensive testing shows that 8b, 16b and 32b reads work as intended > > It makes perfectly sense to also swap 32 bit reading in favor of actual size. > > Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors") > Suggested-by: Bjorn Helgaas <bhelgaas@google.com> > Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> Acked-by: Krzysztof Halasa <khalasa@piap.pl> > --- a/arch/arm/mach-cns3xxx/pcie.c > +++ b/arch/arm/mach-cns3xxx/pcie.c > @@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn, > u32 mask = (0x1ull << (size * 8)) - 1; > int shift = (where % 4) * 8; > > - ret = pci_generic_config_read32(bus, devfn, where, size, val); > + ret = pci_generic_config_read(bus, devfn, where, size, val); > > if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn && > (where & 0xffc) == PCI_CLASS_REVISION)
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c index 5e11ad3164e0..95a11d5b3587 100644 --- a/arch/arm/mach-cns3xxx/pcie.c +++ b/arch/arm/mach-cns3xxx/pcie.c @@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn, u32 mask = (0x1ull << (size * 8)) - 1; int shift = (where % 4) * 8; - ret = pci_generic_config_read32(bus, devfn, where, size, val); + ret = pci_generic_config_read(bus, devfn, where, size, val); if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn && (where & 0xffc) == PCI_CLASS_REVISION)
commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors") reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(), which preserved the property of only doing 32-bit reads. It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(), so it changed writes from always being 32 bits to being the actual size, which works just fine. Due to: - The documentation does not mention that only 32 bit access is allowed. - Writes are already executed using the actual size - Extensive testing shows that 8b, 16b and 32b reads work as intended It makes perfectly sense to also swap 32 bit reading in favor of actual size. Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors") Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Krzysztof Halasa <khalasa@piap.pl> CC: Olof Johansson <olof@lixom.net> CC: Robin Leblon <robin.leblon@ncentric.com> CC: Rob Herring <robh@kernel.org> CC: Russell King <linux@armlinux.org.uk> CC: Tim Harvey <tharvey@gateworks.com> CC: stable@vger.kernel.org # v4.0+ --- arch/arm/mach-cns3xxx/pcie.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)