@@ -5087,6 +5087,12 @@ static void quirk_amd_harvest_no_ats(struct pci_dev *pdev)
pci_info(pdev, "disabling ATS\n");
pdev->ats_cap = 0;
break;
+ case 0x7340:
+ if (pdev->revision == 0xc5) {
+ pci_info(pdev, "disabling ATS\n");
+ pdev->ats_cap = 0;
+ }
+ break;
default:
break;
}
@@ -5096,6 +5102,8 @@ static void quirk_amd_harvest_no_ats(struct pci_dev *pdev)
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_amd_harvest_no_ats);
/* AMD Iceland dGPU */
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6900, quirk_amd_harvest_no_ats);
+/* AMD Navi14 dGPU */
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7340, quirk_amd_harvest_no_ats);
#endif /* CONFIG_PCI_ATS */
/* Freescale PCIe doesn't support MSI in RC mode */
On some harvest configurations, a driver needs to properly initialize some of the caches on the GPU for instances that are harvested (parts of the chip that are disabled due to silicon flaws). For navi we implemented this in the vbios, but it appears some boards went to production with an older vbios. Add a quirk for this board. The necessary code to fix this up is too complex to add as a quirk. v2: use revision id. Only revision 0xc5 should be affected. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1015 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/pci/quirks.c | 8 ++++++++ 1 file changed, 8 insertions(+)