@@ -11755,20 +11755,16 @@ static int bnxt_init_mac_addr(struct bnxt *bp)
static int bnxt_pcie_dsn_get(struct bnxt *bp, u8 dsn[])
{
struct pci_dev *pdev = bp->pdev;
- int pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DSN);
- u32 dw;
+ u64 qword;
- if (!pos) {
- netdev_info(bp->dev, "Unable do read adapter's DSN");
+ qword = pci_get_dsn(pdev);
+ if (!qword) {
+ netdev_info(bp->dev, "Unable to read adapter's DSN");
return -EOPNOTSUPP;
}
- /* DSN (two dw) is at an offset of 4 from the cap pos */
- pos += 4;
- pci_read_config_dword(pdev, pos, &dw);
- put_unaligned_le32(dw, &dsn[0]);
- pci_read_config_dword(pdev, pos + 4, &dw);
- put_unaligned_le32(dw, &dsn[4]);
+ put_unaligned_le64(qword, dsn);
+
bp->flags |= BNXT_FLAG_DSN_VALID;
return 0;
}
Replace the open-coded implementation for reading the PCIe DSN with pci_get_dsn(). Use of put_unaligned_le64 should be correct. pci_get_dsn() will perform two pci_read_config_dword calls. The first dword will be placed in the first 32 bits of the u64, while the second dword will be placed in the upper 32 bits of the u64. On Little Endian systems, the least significant byte comes first, which will be the least significant byte of the first dword, followed by the least significant byte of the second dword. Since the _le32 variations do not perform byte swapping, we will correctly copy the dwords into the dsn[] array in the same order as before. On Big Endian systems, the most significant byte of the second dword will come first. put_unaligned_le64 will perform a CPU_TO_LE64, which will swap things correctly before copying. This should also end up with the correct bytes in the dsn[] array. While at it, fix a small typo in the netdev_info error message when the DSN cannot be read. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Cc: Michael Chan <michael.chan@broadcom.com> --- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-)