@@ -968,8 +968,8 @@ int ixgbe_fcoe_get_hbainfo(struct net_device *netdev,
{
struct ixgbe_adapter *adapter = netdev_priv(netdev);
struct ixgbe_hw *hw = &adapter->hw;
- int i, pos;
- u8 buf[8];
+ u64 dsn;
+ int i;
if (!info)
return -EINVAL;
@@ -985,17 +985,11 @@ int ixgbe_fcoe_get_hbainfo(struct net_device *netdev,
/* Serial Number */
/* Get the PCI-e Device Serial Number Capability */
- pos = pci_find_ext_capability(adapter->pdev, PCI_EXT_CAP_ID_DSN);
- if (pos) {
- pos += 4;
- for (i = 0; i < 8; i++)
- pci_read_config_byte(adapter->pdev, pos + i, &buf[i]);
-
+ dsn = pci_get_dsn(adapter->pdev);
+ if (dsn)
snprintf(info->serial_number, sizeof(info->serial_number),
- "%02X%02X%02X%02X%02X%02X%02X%02X",
- buf[7], buf[6], buf[5], buf[4],
- buf[3], buf[2], buf[1], buf[0]);
- } else
+ "%016llX", dsn);
+ else
snprintf(info->serial_number, sizeof(info->serial_number),
"Unknown");
Replace the open-coded implementation for reading the PCIe DSN with pci_get_dsn(). The original code used a simple for-loop to read the bytes in order into a buffer one byte at a time. The pci_get_dsn() function returns the DSN as a u64, correctly ordering the upper and lower 32 bit dwords. Simplify the display code by using %016llX to display the u64 DSN. This should have equivalent behavior on both Little and Big Endian systems. The bus will have correctly ordered the dwords in the CPU endian format, while pci_get_dsn() will correctly order the lower and higher dwords into a u64. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> --- drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-)