Message ID | 20201209101231.2206479-1-geert+renesas@glider.be (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | [v2] dt-bindings: pci: rcar-pci-ep: Document missing interrupts property | expand |
On Wed, 09 Dec 2020 11:12:31 +0100, Geert Uytterhoeven wrote: > The R-Car PCIe controller does not use interrupts when configured > for endpoint mode, hence the bindings do not document the interrupts > property. However, all DTS files provide interrupts properties, and > thus fail to validate. > > Fix this by documenting the interrupts property. > > Fixes: 4c0f80920923f103 ("dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint controller") > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v2: > - Fix authorship, > - Add Reviewed-by, > - Drop RFC state, > - Fix name of interrupts property in patch description, > - Drop inappropriate Fixes tag, > --- > Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > Applied, thanks!
diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml index fb97f4ea0e63682b..32a3b7665ff5473c 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml @@ -33,6 +33,10 @@ properties: - const: memory2 - const: memory3 + interrupts: + minItems: 3 + maxItems: 3 + power-domains: maxItems: 1 @@ -54,6 +58,7 @@ required: - compatible - reg - reg-names + - interrupts - resets - power-domains - clocks @@ -65,6 +70,7 @@ additionalProperties: false examples: - | #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/r8a774c0-sysc.h> pcie0_ep: pcie-ep@fe000000 { @@ -76,6 +82,9 @@ examples: <0x30000000 0x8000000>, <0x38000000 0x8000000>; reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; resets = <&cpg 319>; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 319>;