Message ID | 20210623100525.19944-5-omp@nvidia.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Lorenzo Pieralisi |
Headers | show
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Wed, 23 Jun 2021 10:05:49 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 23 Jun 2021 10:05:48 +0000 Received: from buildserver-hdc-comms.nvidia.com (172.20.187.5) by mail.nvidia.com (172.20.187.12) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 23 Jun 2021 10:05:44 +0000 From: Om Prakash Singh <omp@nvidia.com> To: <kw@linux.com>, <helgaas@kernel.org>, <vidyas@nvidia.com>, <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com> CC: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <kthota@nvidia.com>, <mmaddireddy@nvidia.com>, Om Prakash Singh <omp@nvidia.com> Subject: [PATCH V3 4/5] PCI: tegra194: Don't allow suspend when Tegra PCIe is in EP mode Date: Wed, 23 Jun 2021 15:35:24 +0530 Message-ID: <20210623100525.19944-5-omp@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210623100525.19944-1-omp@nvidia.com> References: <20210623100525.19944-1-omp@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 533313ef-4666-4a73-7190-08d9362e79f0 X-MS-TrafficTypeDiagnostic: CH0PR12MB5220: X-Microsoft-Antispam-PRVS: <CH0PR12MB5220E9932F7426EF6373AC87DA089@CH0PR12MB5220.namprd12.prod.outlook.com> X-MS-Oob-TLC-OOBClassifiers: OLM:4502; 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Series |
Update pcie-tegra194 driver
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expand
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diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 64ec0da31b5b..ae4c0a29818d 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -2276,6 +2276,11 @@ static int tegra_pcie_dw_suspend_late(struct device *dev) struct tegra_pcie_dw *pcie = dev_get_drvdata(dev); u32 val; + if (pcie->mode == DW_PCIE_EP_TYPE) { + dev_err(dev, "Suspend is not supported in EP mode"); + return -ENOTSUPP; + } + if (!pcie->link_state) return 0;