| Message ID | 20210823164033.27491-2-pali@kernel.org (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | PCI: aardvark: MSI interrupt fixes | expand |
On Mon, 23 Aug 2021 17:40:31 +0100, Pali Rohár <pali@kernel.org> wrote: > > Experiments showed that in register PCIE_MSI_PAYLOAD_REG is stored number > of the last received MSI interrupt and not number of MSI interrupt which > belongs to msi_idx bit. Therefore this implies that aardvark HW can cache > only bits [4:0] of received MSI interrupts with effectively means that it > supports only MSI interrupts with numbers 0-31. > > Do not read PCIE_MSI_PAYLOAD_REG register for determining MSI interrupt > number. Instead ensure that pci-aardvark.c configures only MSI numbers in > range 0-31 and then msi_idx contains correct received MSI number. > > Signed-off-by: Pali Rohár <pali@kernel.org> > Cc: stable@vger.kernel.org > --- > drivers/pci/controller/pci-aardvark.c | 11 +++-------- > 1 file changed, 3 insertions(+), 8 deletions(-) > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c > index 48fbfa7eb24c..81c4a9ff91a3 100644 > --- a/drivers/pci/controller/pci-aardvark.c > +++ b/drivers/pci/controller/pci-aardvark.c > @@ -1232,7 +1232,6 @@ static void advk_pcie_remove_irq_domain(struct advk_pcie *pcie) > static void advk_pcie_handle_msi(struct advk_pcie *pcie) > { > u32 msi_val, msi_mask, msi_status, msi_idx; > - u16 msi_data; > int virq; > > msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG); > @@ -1243,17 +1242,13 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie) > if (!(BIT(msi_idx) & msi_status)) > continue; > > - /* > - * msi_idx contains bits [4:0] of the msi_data and msi_data > - * contains 16bit MSI interrupt number from MSI inner domain > - */ > advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG); > - msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK; > - virq = irq_find_mapping(pcie->msi_inner_domain, msi_data); > + > + virq = irq_find_mapping(pcie->msi_inner_domain, msi_idx); > if (virq) > generic_handle_irq(virq); NAK. As I have explained before, I want this API dead, and I don't feel like doing another pass at the whole of the kernel tree to remove these patterns. A patch targeting stable is not a mandate for using deprecated APIs. You can always send another patch for stable versions before 5.14. M.
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 48fbfa7eb24c..81c4a9ff91a3 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1232,7 +1232,6 @@ static void advk_pcie_remove_irq_domain(struct advk_pcie *pcie) static void advk_pcie_handle_msi(struct advk_pcie *pcie) { u32 msi_val, msi_mask, msi_status, msi_idx; - u16 msi_data; int virq; msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG); @@ -1243,17 +1242,13 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie) if (!(BIT(msi_idx) & msi_status)) continue; - /* - * msi_idx contains bits [4:0] of the msi_data and msi_data - * contains 16bit MSI interrupt number from MSI inner domain - */ advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG); - msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK; - virq = irq_find_mapping(pcie->msi_inner_domain, msi_data); + + virq = irq_find_mapping(pcie->msi_inner_domain, msi_idx); if (virq) generic_handle_irq(virq); else - dev_err_ratelimited(&pcie->pdev->dev, "unexpected MSI 0x%04hx\n", msi_data); + dev_err_ratelimited(&pcie->pdev->dev, "unexpected MSI 0x%02x\n", msi_idx); } advk_writel(pcie, PCIE_ISR0_MSI_INT_PENDING,
Experiments showed that in register PCIE_MSI_PAYLOAD_REG is stored number of the last received MSI interrupt and not number of MSI interrupt which belongs to msi_idx bit. Therefore this implies that aardvark HW can cache only bits [4:0] of received MSI interrupts with effectively means that it supports only MSI interrupts with numbers 0-31. Do not read PCIE_MSI_PAYLOAD_REG register for determining MSI interrupt number. Instead ensure that pci-aardvark.c configures only MSI numbers in range 0-31 and then msi_idx contains correct received MSI number. Signed-off-by: Pali Rohár <pali@kernel.org> Cc: stable@vger.kernel.org --- drivers/pci/controller/pci-aardvark.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-)