| Message ID | 20220313000824.229405-4-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | PCI: qcom: rework pipe_clk/pipe_clk_src handling | expand |
On Sat 12 Mar 18:08 CST 2022, Dmitry Baryshkov wrote: > Use newly defined clk_regmap_mux_safe_ops for PCIe pipe clocks to let > the clock framework automatically park the clock when the clock is > switched off and restore the parent when the clock is switched on. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > --- > drivers/clk/qcom/gcc-sc7280.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c > index 423627d49719..69887e45d02f 100644 > --- a/drivers/clk/qcom/gcc-sc7280.c > +++ b/drivers/clk/qcom/gcc-sc7280.c > @@ -373,13 +373,14 @@ static struct clk_regmap_mux gcc_pcie_0_pipe_clk_src = { > .reg = 0x6b054, > .shift = 0, > .width = 2, > + .safe_src_index = 2, > .parent_map = gcc_parent_map_6, > .clkr = { > .hw.init = &(struct clk_init_data){ > .name = "gcc_pcie_0_pipe_clk_src", > .parent_data = gcc_parent_data_6, > .num_parents = ARRAY_SIZE(gcc_parent_data_6), > - .ops = &clk_regmap_mux_closest_ops, > + .ops = &clk_regmap_mux_safe_ops, > }, > }, > }; > @@ -388,13 +389,14 @@ static struct clk_regmap_mux gcc_pcie_1_pipe_clk_src = { > .reg = 0x8d054, > .shift = 0, > .width = 2, > + .safe_src_index = 2, > .parent_map = gcc_parent_map_7, > .clkr = { > .hw.init = &(struct clk_init_data){ > .name = "gcc_pcie_1_pipe_clk_src", > .parent_data = gcc_parent_data_7, > .num_parents = ARRAY_SIZE(gcc_parent_data_7), > - .ops = &clk_regmap_mux_closest_ops, > + .ops = &clk_regmap_mux_safe_ops, > }, > }, > }; > -- > 2.34.1 >
Quoting Dmitry Baryshkov (2022-03-12 16:08:22) > Use newly defined clk_regmap_mux_safe_ops for PCIe pipe clocks to let > the clock framework automatically park the clock when the clock is > switched off and restore the parent when the clock is switched on. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/clk/qcom/gcc-sc7280.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c > index 423627d49719..69887e45d02f 100644 > --- a/drivers/clk/qcom/gcc-sc7280.c > +++ b/drivers/clk/qcom/gcc-sc7280.c > @@ -373,13 +373,14 @@ static struct clk_regmap_mux gcc_pcie_0_pipe_clk_src = { > .reg = 0x6b054, > .shift = 0, > .width = 2, > + .safe_src_index = 2, Can this be .safe_src_index = gcc_parent_map_6[1].cfg or something that indicates that this is a value inside the parent map and not an array index?
diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c index 423627d49719..69887e45d02f 100644 --- a/drivers/clk/qcom/gcc-sc7280.c +++ b/drivers/clk/qcom/gcc-sc7280.c @@ -373,13 +373,14 @@ static struct clk_regmap_mux gcc_pcie_0_pipe_clk_src = { .reg = 0x6b054, .shift = 0, .width = 2, + .safe_src_index = 2, .parent_map = gcc_parent_map_6, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gcc_pcie_0_pipe_clk_src", .parent_data = gcc_parent_data_6, .num_parents = ARRAY_SIZE(gcc_parent_data_6), - .ops = &clk_regmap_mux_closest_ops, + .ops = &clk_regmap_mux_safe_ops, }, }, }; @@ -388,13 +389,14 @@ static struct clk_regmap_mux gcc_pcie_1_pipe_clk_src = { .reg = 0x8d054, .shift = 0, .width = 2, + .safe_src_index = 2, .parent_map = gcc_parent_map_7, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gcc_pcie_1_pipe_clk_src", .parent_data = gcc_parent_data_7, .num_parents = ARRAY_SIZE(gcc_parent_data_7), - .ops = &clk_regmap_mux_closest_ops, + .ops = &clk_regmap_mux_safe_ops, }, }, };
Use newly defined clk_regmap_mux_safe_ops for PCIe pipe clocks to let the clock framework automatically park the clock when the clock is switched off and restore the parent when the clock is switched on. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/gcc-sc7280.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)