@@ -600,15 +600,15 @@ static void dw_pcie_link_set_max_speed(struct dw_pcie *pci, u32 link_gen)
}
-static u8 dw_pcie_iatu_unroll_enabled(struct dw_pcie *pci)
+static bool dw_pcie_iatu_unroll_enabled(struct dw_pcie *pci)
{
u32 val;
val = dw_pcie_readl_dbi(pci, PCIE_ATU_VIEWPORT);
if (val == 0xffffffff)
- return 1;
+ return true;
- return 0;
+ return false;
}
static void dw_pcie_iatu_detect_regions_unroll(struct dw_pcie *pci)
@@ -680,9 +680,8 @@ void dw_pcie_iatu_detect(struct dw_pcie *pci)
struct device *dev = pci->dev;
struct platform_device *pdev = to_platform_device(dev);
- if (pci->version >= 0x480A || (!pci->version &&
- dw_pcie_iatu_unroll_enabled(pci))) {
- pci->iatu_unroll_enabled = true;
+ pci->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pci);
+ if (pci->iatu_unroll_enabled) {
if (!pci->atu_base) {
struct resource *res =
platform_get_resource_byname(pdev, IORESOURCE_MEM, "atu");
It's pretty much pointless. Even though unrolled version of the internal ATU has been indeed available since DWC PCIe v4.80a IP-core, there is no guarantee it was enabled during the IP-core configuration (Synopsys suggests to contact the Solvnet support for guidance of how to do that for the newer IP-cores). So the only reliable way to find out the unrolled iATU feature availability is indeed to check the iATU viewport register content. In accordance with the reference manual [1] if the register doesn't exist (unrolled iATU is enabled) it's content is fixed with 0xff-s, otherwise it will contain some zeros. So we can freely drop the IP-core version checking in this matter then and use the dw_pcie_iatu_unroll_enabled() method only to detect whether iATU/eDMA space is unrolled. [1] DesignWare Cores, PCI Express Controller, Register Desciptions, v.4.90a, December 2016, p.855 Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> --- drivers/pci/controller/dwc/pcie-designware.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)