diff mbox series

PCI/doc: cleanup references to the legacy PCI DMA API

Message ID 20220330052556.2566388-1-hch@lst.de (mailing list archive)
State Accepted
Commit 05b0ebd06ae6b9e72b747362e52abb400a175080
Headers show
Series PCI/doc: cleanup references to the legacy PCI DMA API | expand

Commit Message

Christoph Hellwig March 30, 2022, 5:25 a.m. UTC
Mention the regular DMA API calls instead of the now removed PCI DMA API.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---

I'd plan to queue this up ASAP together with the pci-dma-compat.h
removal.

 Documentation/PCI/pci.rst | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

Comments

Bjorn Helgaas March 30, 2022, 11:02 a.m. UTC | #1
On Wed, Mar 30, 2022 at 07:25:56AM +0200, Christoph Hellwig wrote:
> Mention the regular DMA API calls instead of the now removed PCI DMA API.
> 
> Signed-off-by: Christoph Hellwig <hch@lst.de>

Acked-by: Bjorn Helgaas <bhelgaas@google.com>

Thanks!

> ---
> 
> I'd plan to queue this up ASAP together with the pci-dma-compat.h
> removal.
> 
>  Documentation/PCI/pci.rst | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/PCI/pci.rst b/Documentation/PCI/pci.rst
> index 87c6f4a6ca32b..67a850b556173 100644
> --- a/Documentation/PCI/pci.rst
> +++ b/Documentation/PCI/pci.rst
> @@ -278,20 +278,20 @@ appropriate parameters.  In general this allows more efficient DMA
>  on systems where System RAM exists above 4G _physical_ address.
>  
>  Drivers for all PCI-X and PCIe compliant devices must call
> -pci_set_dma_mask() as they are 64-bit DMA devices.
> +set_dma_mask() as they are 64-bit DMA devices.
>  
>  Similarly, drivers must also "register" this capability if the device
> -can directly address "consistent memory" in System RAM above 4G physical
> -address by calling pci_set_consistent_dma_mask().
> +can directly address "coherent memory" in System RAM above 4G physical
> +address by calling dma_set_coherent_mask().
>  Again, this includes drivers for all PCI-X and PCIe compliant devices.
>  Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are
>  64-bit DMA capable for payload ("streaming") data but not control
> -("consistent") data.
> +("coherent") data.
>  
>  
>  Setup shared control data
>  -------------------------
> -Once the DMA masks are set, the driver can allocate "consistent" (a.k.a. shared)
> +Once the DMA masks are set, the driver can allocate "coherent" (a.k.a. shared)
>  memory.  See Documentation/core-api/dma-api.rst for a full description of
>  the DMA APIs. This section is just a reminder that it needs to be done
>  before enabling DMA on the device.
> @@ -367,7 +367,7 @@ steps need to be performed:
>    - Disable the device from generating IRQs
>    - Release the IRQ (free_irq())
>    - Stop all DMA activity
> -  - Release DMA buffers (both streaming and consistent)
> +  - Release DMA buffers (both streaming and coherent)
>    - Unregister from other subsystems (e.g. scsi or netdev)
>    - Disable device from responding to MMIO/IO Port addresses
>    - Release MMIO/IO Port resource(s)
> @@ -420,7 +420,7 @@ Once DMA is stopped, clean up streaming DMA first.
>  I.e. unmap data buffers and return buffers to "upstream"
>  owners if there is one.
>  
> -Then clean up "consistent" buffers which contain the control data.
> +Then clean up "coherent" buffers which contain the control data.
>  
>  See Documentation/core-api/dma-api.rst for details on unmapping interfaces.
>  
> -- 
> 2.30.2
>
diff mbox series

Patch

diff --git a/Documentation/PCI/pci.rst b/Documentation/PCI/pci.rst
index 87c6f4a6ca32b..67a850b556173 100644
--- a/Documentation/PCI/pci.rst
+++ b/Documentation/PCI/pci.rst
@@ -278,20 +278,20 @@  appropriate parameters.  In general this allows more efficient DMA
 on systems where System RAM exists above 4G _physical_ address.
 
 Drivers for all PCI-X and PCIe compliant devices must call
-pci_set_dma_mask() as they are 64-bit DMA devices.
+set_dma_mask() as they are 64-bit DMA devices.
 
 Similarly, drivers must also "register" this capability if the device
-can directly address "consistent memory" in System RAM above 4G physical
-address by calling pci_set_consistent_dma_mask().
+can directly address "coherent memory" in System RAM above 4G physical
+address by calling dma_set_coherent_mask().
 Again, this includes drivers for all PCI-X and PCIe compliant devices.
 Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are
 64-bit DMA capable for payload ("streaming") data but not control
-("consistent") data.
+("coherent") data.
 
 
 Setup shared control data
 -------------------------
-Once the DMA masks are set, the driver can allocate "consistent" (a.k.a. shared)
+Once the DMA masks are set, the driver can allocate "coherent" (a.k.a. shared)
 memory.  See Documentation/core-api/dma-api.rst for a full description of
 the DMA APIs. This section is just a reminder that it needs to be done
 before enabling DMA on the device.
@@ -367,7 +367,7 @@  steps need to be performed:
   - Disable the device from generating IRQs
   - Release the IRQ (free_irq())
   - Stop all DMA activity
-  - Release DMA buffers (both streaming and consistent)
+  - Release DMA buffers (both streaming and coherent)
   - Unregister from other subsystems (e.g. scsi or netdev)
   - Disable device from responding to MMIO/IO Port addresses
   - Release MMIO/IO Port resource(s)
@@ -420,7 +420,7 @@  Once DMA is stopped, clean up streaming DMA first.
 I.e. unmap data buffers and return buffers to "upstream"
 owners if there is one.
 
-Then clean up "consistent" buffers which contain the control data.
+Then clean up "coherent" buffers which contain the control data.
 
 See Documentation/core-api/dma-api.rst for details on unmapping interfaces.