diff mbox series

[v4,4/6] ARM: dts: r9a06g032: Add internal PCI bridge node

Message ID 20220428151630.586009-5-herve.codina@bootlin.com (mailing list archive)
State Superseded
Headers show
Series RZN1 USB Host support | expand

Commit Message

Herve Codina April 28, 2022, 3:16 p.m. UTC
Add the device node for the r9a06g032 internal PCI bridge device.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
 arch/arm/boot/dts/r9a06g032.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

Comments

Geert Uytterhoeven April 29, 2022, 8:40 a.m. UTC | #1
On Thu, Apr 28, 2022 at 5:16 PM Herve Codina <herve.codina@bootlin.com> wrote:
> Add the device node for the r9a06g032 internal PCI bridge device.
>
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>

> --- a/arch/arm/boot/dts/r9a06g032.dtsi
> +++ b/arch/arm/boot/dts/r9a06g032.dtsi
> @@ -93,6 +93,35 @@ sysctrl: system-controller@4000c000 {
>                         clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
>                 };
>
> +               pci_usb: pci@40030000 {
> +                       compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
> +                       device_type = "pci";
> +                       clocks = <&sysctrl R9A06G032_HCLK_USBH>,
> +                                <&sysctrl R9A06G032_HCLK_USBPM>,
> +                                <&sysctrl R9A06G032_CLK_PCI_USB>;
> +                       clock-names = "usb_hclkh", "usb_hclkpm", "usb_pciclk";

With the "usb_" prefixes removed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
index 636a6ab31c58..a11a50426a8e 100644
--- a/arch/arm/boot/dts/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/r9a06g032.dtsi
@@ -93,6 +93,35 @@  sysctrl: system-controller@4000c000 {
 			clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
 		};
 
+		pci_usb: pci@40030000 {
+			compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
+			device_type = "pci";
+			clocks = <&sysctrl R9A06G032_HCLK_USBH>,
+				 <&sysctrl R9A06G032_HCLK_USBPM>,
+				 <&sysctrl R9A06G032_CLK_PCI_USB>;
+			clock-names = "usb_hclkh", "usb_hclkpm", "usb_pciclk";
+			power-domains = <&sysctrl>;
+			reg = <0x40030000 0xc00>,
+			      <0x40020000 0x1100>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+
+			bus-range = <0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			ranges = <0x02000000 0 0x40020000 0x40020000 0 0x00010000>;
+			/* Should map all possible DDR as inbound ranges, but
+			 * the IP only supports a 256MB, 512MB, or 1GB window.
+			 * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit)
+			 */
+			dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>;
+			interrupt-map-mask = <0xf800 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
+					 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
+					 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		uart0: serial@40060000 {
 			compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
 			reg = <0x40060000 0x400>;