| Message ID | 20220610082535.12802-11-Sergey.Semin@baikalelectronics.ru (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | PCI: dwc: Various fixes and cleanups | expand |
On Fri, Jun 10, 2022 at 11:25:26AM +0300, Serge Semin wrote: > While the rest of the generic DWC PCIe code is using the dedicated IO-mem > accessors, the dw_pcie_link_up() method for some unobvious reason directly > calls readl() to get PortLogic.DEBUG1 register content. Since the way the > dbi-bus is accessed can be platform-specific let's replace the direct dbi > memory space read procedure with the readl-wrapper invocation. Thus we'll > have a slightly more generic dw_pcie_link_up() method. > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > drivers/pci/controller/dwc/pcie-designware.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index e5c30695f664..f9613835212b 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -548,7 +548,7 @@ int dw_pcie_link_up(struct dw_pcie *pci) if (pci->ops && pci->ops->link_up) return pci->ops->link_up(pci); - val = readl(pci->dbi_base + PCIE_PORT_DEBUG1); + val = dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1); return ((val & PCIE_PORT_DEBUG1_LINK_UP) && (!(val & PCIE_PORT_DEBUG1_LINK_IN_TRAINING))); }