@@ -55,6 +55,19 @@ bool gic_msi_lib_init_dev_msi_info(struc
pci_device_msi_mask_unmask_parent_enable();
break;
+ case DOMAIN_BUS_DEVICE_IMS:
+ /*
+ * Per device IMS should never have any MSI feature bits
+ * set. It's sole purpose is to create a dumb interrupt
+ * chip which has a device specific irq_write_msi_msg()
+ * callback.
+ */
+ if (WARN_ON_ONCE(info->flags))
+ return false;
+
+ /* Core managed MSI descriptors */
+ info->flags = MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS | MSI_FLAG_FREE_MSI_DESCS;
+ break;
default:
/*
* This should never be reached. See
@@ -15,6 +15,8 @@
#define MATCH_PCI_MSI (0)
#endif
+#define MATCH_PLATFORM_MSI BIT(DOMAIN_BUS_PLATFORM_MSI)
+
int gic_msi_lib_irq_domain_select(struct irq_domain *d, struct irq_fwspec *fwspec,
enum irq_domain_bus_token bus_token);
Add the prerequisites for DEVICE MSI into the shared select() and child domain init function. These domains are really trivial and just provide a custom irq chip callback to write the MSI message. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- drivers/irqchip/irq-gic-msi-lib.c | 13 +++++++++++++ drivers/irqchip/irq-gic-msi-lib.h | 2 ++ 2 files changed, 15 insertions(+)