Message ID | 20230113164449.906002-4-robimarko@gmail.com (mailing list archive) |
---|---|
State | Not Applicable |
Delegated to: | Lorenzo Pieralisi |
Headers | show |
Series | [v2,1/9] arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY | expand |
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 06e1da176334..5ef4383ab18b 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -801,6 +801,7 @@ pcie1: pci@10000000 { linux,pci-domain = <1>; bus-range = <0x00 0xff>; num-lanes = <1>; + max-link-speed = <2>; #address-cells = <3>; #size-cells = <2>;
Add the generic 'max-link-speed' property to describe the Gen2 PCIe link generation limit. This allows the generic DWC code to configure the link speed correctly. Signed-off-by: Robert Marko <robimarko@gmail.com> --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 + 1 file changed, 1 insertion(+)