Message ID | 20231130115044.53512-4-shradha.t@samsung.com (mailing list archive) |
---|---|
State | Changes Requested |
Delegated to: | Manivannan Sadhasivam |
Headers | show
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Series |
Add support for RAS DES feature in PCIe DW controller
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expand
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diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 064b4951afd8..16c9018c2ada 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -1074,4 +1074,8 @@ void dw_pcie_setup(struct dw_pcie *pci) break; } dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val); + + val = dwc_pcie_rasdes_debugfs_init(pci); + if (val) + dev_err(pci->dev, "Couldn't create debugfs files\n"); }
Add call to initialize debugfs from DWC driver and create the RASDES debugfs hierarchy for each platform driver. Since it can be used for both DW HOST controller as well as DW EP controller, add it in the common setup function. Signed-off-by: Shradha Todi <shradha.t@samsung.com> --- drivers/pci/controller/dwc/pcie-designware.c | 4 ++++ 1 file changed, 4 insertions(+)