| Message ID | 20231206145041.667900-1-heiko@sntech.de (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Krzysztof Wilczyński |
| Headers | show |
| Series | dt-bindings: PCI: dwc: rockchip: document optional pcie reference clock input | expand |
On 06/12/2023 15:50, Heiko Stuebner wrote: > From: Heiko Stuebner <heiko.stuebner@cherry.de> > > On some boards the 100MHz PCIe reference clock to both controller and > devices is controllable. Add that clock to the list of clocks. > > The clock is optional, so the minItems stays the same. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
Hello, > On some boards the 100MHz PCIe reference clock to both controller and > devices is controllable. Add that clock to the list of clocks. > > The clock is optional, so the minItems stays the same. Applied to dt-bindings, thank you! [1/1] dt-bindings: PCI: dwc: rockchip: Document optional PCIe reference clock input https://git.kernel.org/pci/pci/c/639f666cf84e Krzysztof
diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 1ae8dcfa072c..5f719218c472 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -49,6 +49,7 @@ properties: - description: APB clock for PCIe - description: Auxiliary clock for PCIe - description: PIPE clock + - description: Reference clock for PCIe clock-names: minItems: 5 @@ -59,6 +60,7 @@ properties: - const: pclk - const: aux - const: pipe + - const: ref interrupts: items: