Message ID | 20240531161337.864994-8-sean.anderson@linux.dev (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Bjorn Helgaas |
Headers | show |
Series | PCI: xilinx-nwl: Add phy support | expand |
On 5/31/24 18:13, Sean Anderson wrote: > Add PCIe phy bindings for the ZCU102. > > Signed-off-by: Sean Anderson <sean.anderson@linux.dev> > Tested-by: thippeswamy.havalige@amd.com > --- > > (no changes since v2) > > Changes in v2: > - Remove phy-names > > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts > index ad8f23a0ec67..d2175f3dd099 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts > @@ -941,6 +941,7 @@ conf-pull-none { > > &pcie { > status = "okay"; > + phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>; > }; > > &psgtr { Acked-by: Michal Simek <michal.simek@amd.com> Thanks, Michal
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts index ad8f23a0ec67..d2175f3dd099 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts @@ -941,6 +941,7 @@ conf-pull-none { &pcie { status = "okay"; + phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>; }; &psgtr {