diff mbox series

[v2,4/7] arm64: dts: agilex: add soc0 label

Message ID 20240809151213.94533-5-matthew.gerlach@linux.intel.com (mailing list archive)
State New
Delegated to: Manivannan Sadhasivam
Headers show
Series Add PCIe Root Port support for Agilex family of chips | expand

Commit Message

Matthew Gerlach Aug. 9, 2024, 3:12 p.m. UTC 
From: Matthew Gerlach <matthew.gerlach@linux.intel.com>

Add a label to the soc@0 device tree node.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index 2a5eeb21da47..98e14b9b4228 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -149,7 +149,7 @@  usbphy0: usbphy {
 		compatible = "usb-nop-xceiv";
 	};
 
-	soc@0 {
+	soc0: soc@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";