| Message ID | 20240923-pcie_ep_range-v2-3-78d2ea434d9f@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Manivannan Sadhasivam |
| Headers | show |
| Series | PCI: ep: dwc/imx6: Add bus address support for PCI endpoint devices | expand |
> -----Original Message----- > From: Frank Li <frank.li@nxp.com> > Sent: 2024年9月24日 2:59 > To: Lorenzo Pieralisi <lpieralisi@kernel.org>; Krzysztof Wilczyński > <kw@linux.com>; Manivannan Sadhasivam > <manivannan.sadhasivam@linaro.org>; Rob Herring <robh@kernel.org>; > Bjorn Helgaas <bhelgaas@google.com>; Krzysztof Kozlowski > <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Abraham I > <kishon@kernel.org>; Saravana Kannan <saravanak@google.com>; Jingoo > Han <jingoohan1@gmail.com>; Gustavo Pimentel > <gustavo.pimentel@synopsys.com>; Jesper Nilsson > <jesper.nilsson@axis.com>; Hongxing Zhu <hongxing.zhu@nxp.com>; Lucas > Stach <l.stach@pengutronix.de>; Shawn Guo <shawnguo@kernel.org>; > Sascha Hauer <s.hauer@pengutronix.de>; Pengutronix Kernel Team > <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com> > Cc: linux-pci@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@axis.com; > linux-arm-kernel@lists.infradead.org; imx@lists.linux.dev; Krzysztof > Wilczyński <kwilczynski@kernel.org>; Frank Li <frank.li@nxp.com> > Subject: [PATCH v2 3/4] PCI: imx6: Pass correct sub mode when calling > phy_set_mode_ext() > > Fix hardcoding to Root Complex (RC) mode by adding a drvdata mode check. > Pass PHY_MODE_PCIE_EP if the PCI controller operates in Endpoint (EP) > mode. > > Fixes: 8026f2d8e8a9 ("PCI: imx6: Call common PHY API to set mode, speed, > and submode") > Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Best Regards Richard Zhu > --- > drivers/pci/controller/dwc/pci-imx6.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c > b/drivers/pci/controller/dwc/pci-imx6.c > index 808d1f1054173..bdc2b372e6c13 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -961,7 +961,9 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp) > goto err_clk_disable; > } > > - ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, > PHY_MODE_PCIE_RC); > + ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, > + imx_pcie->drvdata->mode == > DW_PCIE_EP_TYPE ? > + PHY_MODE_PCIE_EP : PHY_MODE_PCIE_RC); > if (ret) { > dev_err(dev, "unable to set PCIe PHY mode\n"); > goto err_phy_exit; > > -- > 2.34.1
On Mon, Sep 23, 2024 at 02:59:21PM -0400, Frank Li wrote: > Fix hardcoding to Root Complex (RC) mode by adding a drvdata mode check. > Pass PHY_MODE_PCIE_EP if the PCI controller operates in Endpoint (EP) mode. > Patch descriptions should fit within 75 columns. > Fixes: 8026f2d8e8a9 ("PCI: imx6: Call common PHY API to set mode, speed, and submode") > Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > drivers/pci/controller/dwc/pci-imx6.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 808d1f1054173..bdc2b372e6c13 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -961,7 +961,9 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp) > goto err_clk_disable; > } > > - ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC); > + ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, > + imx_pcie->drvdata->mode == DW_PCIE_EP_TYPE ? > + PHY_MODE_PCIE_EP : PHY_MODE_PCIE_RC); > if (ret) { > dev_err(dev, "unable to set PCIe PHY mode\n"); > goto err_phy_exit; > > -- > 2.34.1 >
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 808d1f1054173..bdc2b372e6c13 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -961,7 +961,9 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp) goto err_clk_disable; } - ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC); + ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, + imx_pcie->drvdata->mode == DW_PCIE_EP_TYPE ? + PHY_MODE_PCIE_EP : PHY_MODE_PCIE_RC); if (ret) { dev_err(dev, "unable to set PCIe PHY mode\n"); goto err_phy_exit;
Fix hardcoding to Root Complex (RC) mode by adding a drvdata mode check. Pass PHY_MODE_PCIE_EP if the PCI controller operates in Endpoint (EP) mode. Fixes: 8026f2d8e8a9 ("PCI: imx6: Call common PHY API to set mode, speed, and submode") Signed-off-by: Frank Li <Frank.Li@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)