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[02/25] PCI: size0 is unrelated to add_align

Message ID 20241216175632.4175-3-ilpo.jarvinen@linux.intel.com (mailing list archive)
State New
Delegated to: Bjorn Helgaas
Headers show
Series PCI: Resource fitting/assignment fixes and cleanups | expand

Commit Message

Ilpo Järvinen Dec. 16, 2024, 5:56 p.m. UTC 
The commit 566f1dd52816 ("PCI: Relax bridge window tail sizing rules")
relaxed bridge window tail alignment rule for the non-optional part
(size0, no add_size/add_align). The required alignment given for
pbus_upstream_space_available(), however, was add_align which relates
only to size1 alignment.

As pbus_upstream_space_available() only selects between normal and
relaxed tail alignment of the bridge window, the different alignment
only makes relaxed tail alignment to be used more often than what was
intended which should be harmless because relaxed tail alignment itself
should work in all cases.

For consistency, change pbus_upstream_space_available() call to use
min_align which is the alignment that is going to be used for the bridge
window in the case where size0 sized allocation is attempted.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 drivers/pci/setup-bus.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index d92832e1f4a1..09c275f8d088 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -1145,7 +1145,7 @@  static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 
 	if (bus->self && size0 &&
 	    !pbus_upstream_space_available(bus, mask | IORESOURCE_PREFETCH, type,
-					   size0, add_align)) {
+					   size0, min_align)) {
 		min_align = 1ULL << (max_order + __ffs(SZ_1M));
 		min_align = max(min_align, win_align);
 		size0 = calculate_memsize(size, min_size, 0, 0, resource_size(b_res), win_align);