Message ID | 20241224-enable_ecam-v2-1-43daef68a901@oss.qualcomm.com (mailing list archive) |
---|---|
State | New |
Delegated to: | Manivannan Sadhasivam |
Headers | show |
Series | PCI: dwc: Add ECAM support with iATU configuration | expand |
On Tue, Dec 24, 2024 at 07:40:15PM +0530, Krishna Chaitanya Chundru wrote: > From: Krishna chaitanya chundru <quic_krichai@quicinc.com> > > Increase the configuration size to 256MB as required by the ECAM feature. > And also move config space, DBI, ELBI, iATU to upper PCIe region and use > lower PCIe region entierly for BAR region. This problem description seems to assume that the reader is familiar with some recent discussion elsewhere. Please ensure that what we enter into the git history can be understood by uninitiated readers. Also please follow the flow described in https://docs.kernel.org/process/submitting-patches.html#describe-your-changes (i.e. first describe your problem, then describe the solution) > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> S-o-b doesn't match patch author. Regards, Bjorn > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 55db1c83ef55..bece859aee31 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -2201,10 +2201,10 @@ wifi: wifi@17a10040 { > pcie1: pcie@1c08000 { > compatible = "qcom,pcie-sc7280"; > reg = <0 0x01c08000 0 0x3000>, > - <0 0x40000000 0 0xf1d>, > - <0 0x40000f20 0 0xa8>, > - <0 0x40001000 0 0x1000>, > - <0 0x40100000 0 0x100000>; > + <4 0x00000000 0 0xf1d>, > + <4 0x00000f20 0 0xa8>, > + <4 0x10000000 0 0x1000>, > + <4 0x00000000 0 0x10000000>; > > reg-names = "parf", "dbi", "elbi", "atu", "config"; > device_type = "pci"; > @@ -2215,8 +2215,8 @@ pcie1: pcie@1c08000 { > #address-cells = <3>; > #size-cells = <2>; > > - ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, > - <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; > + ranges = <0x01000000 0x0 0x00000000 0x0 0x40000000 0x0 0x100000>, > + <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>; > > interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, > > -- > 2.34.1 >
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 55db1c83ef55..bece859aee31 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2201,10 +2201,10 @@ wifi: wifi@17a10040 { pcie1: pcie@1c08000 { compatible = "qcom,pcie-sc7280"; reg = <0 0x01c08000 0 0x3000>, - <0 0x40000000 0 0xf1d>, - <0 0x40000f20 0 0xa8>, - <0 0x40001000 0 0x1000>, - <0 0x40100000 0 0x100000>; + <4 0x00000000 0 0xf1d>, + <4 0x00000f20 0 0xa8>, + <4 0x10000000 0 0x1000>, + <4 0x00000000 0 0x10000000>; reg-names = "parf", "dbi", "elbi", "atu", "config"; device_type = "pci"; @@ -2215,8 +2215,8 @@ pcie1: pcie@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, - <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x40000000 0x0 0x100000>, + <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>; interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,