Message ID | 20250115092134.2904773-8-christian.bruel@foss.st.com (mailing list archive) |
---|---|
State | New |
Delegated to: | Krzysztof WilczyĆski |
Headers | show |
Series | Add STM32MP25 PCIe drivers | expand |
diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi index 8fdd5f020425..f0d814bc7c60 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -82,6 +82,26 @@ pins { }; }; + pcie_pins_a: pcie-0 { + pins { + pinmux = <STM32_PINMUX('J', 0, AF4)>; + bias-disable; + }; + }; + + pcie_init_pins_a: pcie-init-0 { + pins { + pinmux = <STM32_PINMUX('J', 0, GPIO)>; + output-low; + }; + }; + + pcie_sleep_pins_a: pcie-sleep-0 { + pins { + pinmux = <STM32_PINMUX('J', 0, ANALOG)>; + }; + }; + sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins1 { pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
Add PCIe pinctrl entries in stm32mp25-pinctrl.dtsi init: forces GPIO to low while probing so CLKREQ is low for phy_init default: restore the AFMUX after controller probe Add Analog pins of PCIe to perform power cycle Signed-off-by: Christian Bruel <christian.bruel@foss.st.com> --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+)