diff mbox series

PCI: switchtec: Include PCI100X devices support

Message ID 20250120095524.243103-1-Saladi.Rakeshbabu@microchip.com (mailing list archive)
State New
Headers show
Series PCI: switchtec: Include PCI100X devices support | expand

Commit Message

Rakesh Babu Saladi Jan. 20, 2025, 9:55 a.m. UTC 
Add the Microchip Parts to the existing device ID
table so that the driver supports PCI100x devices too.

Add a new macro to quirk the Microchip switchtec PCI100x parts
to allow DMA access via NTB to work when the IOMMU is turned on.

PCI100x family has 6 variants, each variant is designed for different
application usages, different port counts and lane counts.

PCI1001 has 1 x4 upstream port and 3 x4 downstream ports.
PCI1002 has 1 x4 upstream port and 4 x2 downstream ports.
PCI1003 has 2 x4 upstream ports, 2 x2 upstream ports and 2 x2
downstream ports.
PCI1004 has 4 x4 upstream ports.
PCI1005 has 1 x4 upstream port and 6 x2 downstream ports.
PCI1006 has 6 x2 upstream ports and 2 x2 downstream ports.

Signed-off-by: Rakesh Babu Saladi <Saladi.Rakeshbabu@microchip.com>
---
 drivers/pci/quirks.c           | 11 +++++++++++
 drivers/pci/switch/switchtec.c | 26 ++++++++++++++++++++++++++
 2 files changed, 37 insertions(+)

Comments

Logan Gunthorpe Jan. 20, 2025, 5:31 p.m. UTC | #1 
On 2025-01-20 02:55, Rakesh Babu Saladi wrote:
> Add the Microchip Parts to the existing device ID
> table so that the driver supports PCI100x devices too.
> 
> Add a new macro to quirk the Microchip switchtec PCI100x parts
> to allow DMA access via NTB to work when the IOMMU is turned on.
> 
> PCI100x family has 6 variants, each variant is designed for different
> application usages, different port counts and lane counts.
> 
> PCI1001 has 1 x4 upstream port and 3 x4 downstream ports.
> PCI1002 has 1 x4 upstream port and 4 x2 downstream ports.
> PCI1003 has 2 x4 upstream ports, 2 x2 upstream ports and 2 x2
> downstream ports.
> PCI1004 has 4 x4 upstream ports.
> PCI1005 has 1 x4 upstream port and 6 x2 downstream ports.
> PCI1006 has 6 x2 upstream ports and 2 x2 downstream ports.
> 
> Signed-off-by: Rakesh Babu Saladi <Saladi.Rakeshbabu@microchip.com>
Looks good to me, thanks!

Acked-By: Logan Gunthorpe <logang@deltatee.com>

Logan
diff mbox series

Patch

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index eeec1d6f9023..266ab5f8c6e1 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5906,6 +5906,17 @@  SWITCHTEC_QUIRK(0x5552);  /* PAXA 52XG5 */
 SWITCHTEC_QUIRK(0x5536);  /* PAXA 36XG5 */
 SWITCHTEC_QUIRK(0x5528);  /* PAXA 28XG5 */
 
+#define SWITCHTEC_PCI100X_QUIRK(vid) \
+	DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_EFAR, vid, \
+		PCI_CLASS_BRIDGE_OTHER, 8, quirk_switchtec_ntb_dma_alias)
+SWITCHTEC_PCI100X_QUIRK(0x1001);  /* PCI1001XG4 */
+SWITCHTEC_PCI100X_QUIRK(0x1002);  /* PCI1002XG4 */
+SWITCHTEC_PCI100X_QUIRK(0x1003);  /* PCI1003XG4 */
+SWITCHTEC_PCI100X_QUIRK(0x1004);  /* PCI1004XG4 */
+SWITCHTEC_PCI100X_QUIRK(0x1005);  /* PCI1005XG4 */
+SWITCHTEC_PCI100X_QUIRK(0x1006);  /* PCI1006XG4 */
+
+
 /*
  * The PLX NTB uses devfn proxy IDs to move TLPs between NT endpoints.
  * These IDs are used to forward responses to the originator on the other
diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c
index 5b921387eca6..faaca76407c8 100644
--- a/drivers/pci/switch/switchtec.c
+++ b/drivers/pci/switch/switchtec.c
@@ -1726,6 +1726,26 @@  static void switchtec_pci_remove(struct pci_dev *pdev)
 		.driver_data = gen, \
 	}
 
+#define SWITCHTEC_PCI100X_DEVICE(device_id, gen) \
+	{ \
+		.vendor     = PCI_VENDOR_ID_EFAR, \
+		.device     = device_id, \
+		.subvendor  = PCI_ANY_ID, \
+		.subdevice  = PCI_ANY_ID, \
+		.class      = (PCI_CLASS_MEMORY_OTHER << 8), \
+		.class_mask = 0xFFFFFFFF, \
+		.driver_data = gen, \
+	}, \
+	{ \
+		.vendor     = PCI_VENDOR_ID_EFAR, \
+		.device     = device_id, \
+		.subvendor  = PCI_ANY_ID, \
+		.subdevice  = PCI_ANY_ID, \
+		.class      = (PCI_CLASS_BRIDGE_OTHER << 8), \
+		.class_mask = 0xFFFFFFFF, \
+		.driver_data = gen, \
+	}
+
 static const struct pci_device_id switchtec_pci_tbl[] = {
 	SWITCHTEC_PCI_DEVICE(0x8531, SWITCHTEC_GEN3),  /* PFX 24xG3 */
 	SWITCHTEC_PCI_DEVICE(0x8532, SWITCHTEC_GEN3),  /* PFX 32xG3 */
@@ -1820,6 +1840,12 @@  static const struct pci_device_id switchtec_pci_tbl[] = {
 	SWITCHTEC_PCI_DEVICE(0x5552, SWITCHTEC_GEN5),  /* PAXA 52XG5 */
 	SWITCHTEC_PCI_DEVICE(0x5536, SWITCHTEC_GEN5),  /* PAXA 36XG5 */
 	SWITCHTEC_PCI_DEVICE(0x5528, SWITCHTEC_GEN5),  /* PAXA 28XG5 */
+	SWITCHTEC_PCI100X_DEVICE(0x1001, SWITCHTEC_GEN4),  /* PCI1001 16XG4 */
+	SWITCHTEC_PCI100X_DEVICE(0x1002, SWITCHTEC_GEN4),  /* PCI1002 12XG4 */
+	SWITCHTEC_PCI100X_DEVICE(0x1003, SWITCHTEC_GEN4),  /* PCI1003 16XG4 */
+	SWITCHTEC_PCI100X_DEVICE(0x1004, SWITCHTEC_GEN4),  /* PCI1004 16XG4 */
+	SWITCHTEC_PCI100X_DEVICE(0x1005, SWITCHTEC_GEN4),  /* PCI1005 16XG4 */
+	SWITCHTEC_PCI100X_DEVICE(0x1006, SWITCHTEC_GEN4),  /* PCI1006 16XG4 */
 	{0}
 };
 MODULE_DEVICE_TABLE(pci, switchtec_pci_tbl);