Message ID | 20250124-preset_v2-v4-2-0b512cad08e1@oss.qualcomm.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | PCI: dwc: Add support for configuring lane equalization presets | expand |
On 24.01.2025 12:22 PM, Krishna Chaitanya Chundru wrote: > PCIe equalization presets are predefined settings used to optimize > signal integrity by compensating for signal loss and distortion in > high-speed data transmission. > > As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates > of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to > configure lane equalization presets for each lane to enhance the PCIe > link reliability. Each preset value represents a different combination > of pre-shoot and de-emphasis values. For each data rate, different > registers are defined: for 8.0 GT/s, registers are defined in section > 7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has > an extra receiver preset hint, requiring 16 bits per lane, while the > remaining data rates use 8 bits per lane. > > Based on the number of lanes and the supported data rate, this function > reads the device tree property and stores in the presets structure. > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- > drivers/pci/of.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ > drivers/pci/pci.h | 24 +++++++++++++++++++++++- > 2 files changed, 70 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/of.c b/drivers/pci/of.c > index dacea3fc5128..7aa17c0042c5 100644 > --- a/drivers/pci/of.c > +++ b/drivers/pci/of.c > @@ -826,3 +826,50 @@ u32 of_pci_get_slot_power_limit(struct device_node *node, > return slot_power_limit_mw; > } > EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit); > + > +/** > + * of_pci_get_equalization_presets - Parses the "eq-presets-ngts" property. > + * > + * @dev: Device containing the properties. > + * @presets: Pointer to store the parsed data. > + * @num_lanes: Maximum number of lanes supported. > + * > + * If the property is present read and store the data in the preset structure > + * assign default value 0xff to indicate property is not present. > + * > + * If the property is not found or is invalid, returns 0. > + */ > +int of_pci_get_equalization_presets(struct device *dev, > + struct pci_eq_presets *presets, > + int num_lanes) > +{ > + char name[20]; > + int ret; > + > + presets->eq_presets_8gts[0] = 0xff; > + if (of_property_present(dev->of_node, "eq-presets-8gts")) { > + ret = of_property_read_u16_array(dev->of_node, "eq-presets-8gts", > + presets->eq_presets_8gts, num_lanes); > + if (ret) { > + dev_err(dev, "Error reading eq-presets-8gts %d\n", ret); > + return ret; > + } > + } > + > + for (int i = 0; i < EQ_PRESET_TYPE_MAX; i++) { > + presets->eq_presets_Ngts[i][0] = 0xff; > + snprintf(name, sizeof(name), "eq-presets-%dgts", 8 << (i + 1)); > + if (of_property_present(dev->of_node, name)) { of_property_count_u8_elems returns -EINVAL if the property does not exist you can then drop a level of indentation: ret = of_property_read_u8_array...; if (ret == -EINVAL) { continue; } else { ... } similarly above for 8gts Konrad
On 25.01.2025 1:47 PM, Konrad Dybcio wrote: > On 24.01.2025 12:22 PM, Krishna Chaitanya Chundru wrote: >> PCIe equalization presets are predefined settings used to optimize >> signal integrity by compensating for signal loss and distortion in >> high-speed data transmission. >> >> As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates >> of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to >> configure lane equalization presets for each lane to enhance the PCIe >> link reliability. Each preset value represents a different combination >> of pre-shoot and de-emphasis values. For each data rate, different >> registers are defined: for 8.0 GT/s, registers are defined in section >> 7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has >> an extra receiver preset hint, requiring 16 bits per lane, while the >> remaining data rates use 8 bits per lane. >> >> Based on the number of lanes and the supported data rate, this function >> reads the device tree property and stores in the presets structure. >> >> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> >> --- >> drivers/pci/of.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ >> drivers/pci/pci.h | 24 +++++++++++++++++++++++- >> 2 files changed, 70 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/pci/of.c b/drivers/pci/of.c >> index dacea3fc5128..7aa17c0042c5 100644 >> --- a/drivers/pci/of.c >> +++ b/drivers/pci/of.c >> @@ -826,3 +826,50 @@ u32 of_pci_get_slot_power_limit(struct device_node *node, >> return slot_power_limit_mw; >> } >> EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit); >> + >> +/** >> + * of_pci_get_equalization_presets - Parses the "eq-presets-ngts" property. >> + * >> + * @dev: Device containing the properties. >> + * @presets: Pointer to store the parsed data. >> + * @num_lanes: Maximum number of lanes supported. >> + * >> + * If the property is present read and store the data in the preset structure >> + * assign default value 0xff to indicate property is not present. >> + * >> + * If the property is not found or is invalid, returns 0. >> + */ >> +int of_pci_get_equalization_presets(struct device *dev, >> + struct pci_eq_presets *presets, >> + int num_lanes) >> +{ >> + char name[20]; >> + int ret; >> + >> + presets->eq_presets_8gts[0] = 0xff; Also please #define 0xff as a reserved value Konrad >> + if (of_property_present(dev->of_node, "eq-presets-8gts")) { >> + ret = of_property_read_u16_array(dev->of_node, "eq-presets-8gts", >> + presets->eq_presets_8gts, num_lanes); >> + if (ret) { >> + dev_err(dev, "Error reading eq-presets-8gts %d\n", ret); >> + return ret; >> + } >> + } >> + >> + for (int i = 0; i < EQ_PRESET_TYPE_MAX; i++) { >> + presets->eq_presets_Ngts[i][0] = 0xff; >> + snprintf(name, sizeof(name), "eq-presets-%dgts", 8 << (i + 1)); >> + if (of_property_present(dev->of_node, name)) { > > of_property_count_u8_elems returns -EINVAL if the property does not exist > > you can then drop a level of indentation: > > ret = of_property_read_u8_array...; > if (ret == -EINVAL) { > continue; > } else { > ... > } > > > similarly above for 8gts > > Konrad
On Fri, Jan 24, 2025 at 04:52:48PM +0530, Krishna Chaitanya Chundru wrote: > PCIe equalization presets are predefined settings used to optimize > signal integrity by compensating for signal loss and distortion in > high-speed data transmission. > > As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates > of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to > configure lane equalization presets for each lane to enhance the PCIe > link reliability. Each preset value represents a different combination > of pre-shoot and de-emphasis values. For each data rate, different > registers are defined: for 8.0 GT/s, registers are defined in section > 7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has > an extra receiver preset hint, requiring 16 bits per lane, while the > remaining data rates use 8 bits per lane. > > Based on the number of lanes and the supported data rate, this function > reads the device tree property and stores in the presets structure. > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- > drivers/pci/of.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ > drivers/pci/pci.h | 24 +++++++++++++++++++++++- > 2 files changed, 70 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/of.c b/drivers/pci/of.c > index dacea3fc5128..7aa17c0042c5 100644 > --- a/drivers/pci/of.c > +++ b/drivers/pci/of.c > @@ -826,3 +826,50 @@ u32 of_pci_get_slot_power_limit(struct device_node *node, > return slot_power_limit_mw; > } > EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit); > + > +/** > + * of_pci_get_equalization_presets - Parses the "eq-presets-ngts" property. > + * > + * @dev: Device containing the properties. > + * @presets: Pointer to store the parsed data. > + * @num_lanes: Maximum number of lanes supported. > + * > + * If the property is present read and store the data in the preset structure > + * assign default value 0xff to indicate property is not present. > + * > + * If the property is not found or is invalid, returns 0. Use "Return:" prefix to define the return value. Like, "Return: 0 if the property is not available or successfully parsed, errno otherwise." > + */ > +int of_pci_get_equalization_presets(struct device *dev, > + struct pci_eq_presets *presets, > + int num_lanes) > +{ > + char name[20]; > + int ret; > + > + presets->eq_presets_8gts[0] = 0xff; > + if (of_property_present(dev->of_node, "eq-presets-8gts")) { > + ret = of_property_read_u16_array(dev->of_node, "eq-presets-8gts", > + presets->eq_presets_8gts, num_lanes); As Konrad mentioned, you can use -EINVAL from these APIs to determine whether the property exists or not. > + if (ret) { > + dev_err(dev, "Error reading eq-presets-8gts %d\n", ret); > + return ret; > + } > + } > + > + for (int i = 0; i < EQ_PRESET_TYPE_MAX; i++) { > + presets->eq_presets_Ngts[i][0] = 0xff; > + snprintf(name, sizeof(name), "eq-presets-%dgts", 8 << (i + 1)); > + if (of_property_present(dev->of_node, name)) { > + ret = of_property_read_u8_array(dev->of_node, name, > + presets->eq_presets_Ngts[i], > + num_lanes); > + if (ret) { > + dev_err(dev, "Error %s %d\n", name, ret); "Error reading..." - Mani
diff --git a/drivers/pci/of.c b/drivers/pci/of.c index dacea3fc5128..7aa17c0042c5 100644 --- a/drivers/pci/of.c +++ b/drivers/pci/of.c @@ -826,3 +826,50 @@ u32 of_pci_get_slot_power_limit(struct device_node *node, return slot_power_limit_mw; } EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit); + +/** + * of_pci_get_equalization_presets - Parses the "eq-presets-ngts" property. + * + * @dev: Device containing the properties. + * @presets: Pointer to store the parsed data. + * @num_lanes: Maximum number of lanes supported. + * + * If the property is present read and store the data in the preset structure + * assign default value 0xff to indicate property is not present. + * + * If the property is not found or is invalid, returns 0. + */ +int of_pci_get_equalization_presets(struct device *dev, + struct pci_eq_presets *presets, + int num_lanes) +{ + char name[20]; + int ret; + + presets->eq_presets_8gts[0] = 0xff; + if (of_property_present(dev->of_node, "eq-presets-8gts")) { + ret = of_property_read_u16_array(dev->of_node, "eq-presets-8gts", + presets->eq_presets_8gts, num_lanes); + if (ret) { + dev_err(dev, "Error reading eq-presets-8gts %d\n", ret); + return ret; + } + } + + for (int i = 0; i < EQ_PRESET_TYPE_MAX; i++) { + presets->eq_presets_Ngts[i][0] = 0xff; + snprintf(name, sizeof(name), "eq-presets-%dgts", 8 << (i + 1)); + if (of_property_present(dev->of_node, name)) { + ret = of_property_read_u8_array(dev->of_node, name, + presets->eq_presets_Ngts[i], + num_lanes); + if (ret) { + dev_err(dev, "Error %s %d\n", name, ret); + return ret; + } + } + } + + return 0; +} +EXPORT_SYMBOL_GPL(of_pci_get_equalization_presets); diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 14d00ce45bfa..3a8c04e3b30d 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -7,6 +7,8 @@ /* Number of possible devfns: 0.0 to 1f.7 inclusive */ #define MAX_NR_DEVFNS 256 +#define MAX_NR_LANES 16 + #define PCI_FIND_CAP_TTL 48 #define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */ @@ -732,6 +734,18 @@ static inline u64 pci_rebar_size_to_bytes(int size) struct device_node; +enum equalization_preset_type { + EQ_PRESET_TYPE_16GTS, + EQ_PRESET_TYPE_32GTS, + EQ_PRESET_TYPE_64GTS, + EQ_PRESET_TYPE_MAX +}; + +struct pci_eq_presets { + u16 eq_presets_8gts[MAX_NR_LANES]; + u8 eq_presets_Ngts[EQ_PRESET_TYPE_MAX][MAX_NR_LANES]; +}; + #ifdef CONFIG_OF int of_pci_parse_bus_range(struct device_node *node, struct resource *res); int of_get_pci_domain_nr(struct device_node *node); @@ -746,7 +760,9 @@ void pci_set_bus_of_node(struct pci_bus *bus); void pci_release_bus_of_node(struct pci_bus *bus); int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge); - +int of_pci_get_equalization_presets(struct device *dev, + struct pci_eq_presets *presets, + int num_lanes); #else static inline int of_pci_parse_bus_range(struct device_node *node, struct resource *res) @@ -793,6 +809,12 @@ static inline int devm_of_pci_bridge_init(struct device *dev, struct pci_host_br return 0; } +static inline int of_pci_get_equalization_presets(struct device *dev, + struct pci_eq_presets *presets, + int num_lanes) +{ + return 0; +} #endif /* CONFIG_OF */ struct of_changeset;
PCIe equalization presets are predefined settings used to optimize signal integrity by compensating for signal loss and distortion in high-speed data transmission. As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to configure lane equalization presets for each lane to enhance the PCIe link reliability. Each preset value represents a different combination of pre-shoot and de-emphasis values. For each data rate, different registers are defined: for 8.0 GT/s, registers are defined in section 7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has an extra receiver preset hint, requiring 16 bits per lane, while the remaining data rates use 8 bits per lane. Based on the number of lanes and the supported data rate, this function reads the device tree property and stores in the presets structure. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- drivers/pci/of.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci.h | 24 +++++++++++++++++++++++- 2 files changed, 70 insertions(+), 1 deletion(-)