| Message ID | 20250207-ppcyaml-v2-5-8137b0c42526@posteo.net (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Delegated to: | Krzysztof Wilczyński |
| Headers | show |
| Series | YAML conversion of several Freescale/PowerPC DT bindings | expand |
On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer via B4 Relay wrote: > From: "J. Neuschäfer" <j.ne@posteo.net> > > The devicetree bindings for Freescale DMA engines have so far existed as > a text file. This patch converts them to YAML, and specifies all the > compatible strings currently in use in arch/powerpc/boot/dts. > > Signed-off-by: J. Neuschäfer <j.ne@posteo.net> > --- > > V2: > - remove unnecessary multiline markers > - fix additionalProperties to always be false > - add description/maxItems to interrupts > - add missing #address-cells/#size-cells properties > - convert "Note on DMA channel compatible properties" to YAML by listing > fsl,ssi-dma-channel as a valid compatible value > - fix property ordering in examples: compatible and reg come first > - add missing newlines in examples > - trim subject line (remove "bindings") > --- > .../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++ > .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++ > .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++ > .../devicetree/bindings/powerpc/fsl/dma.txt | 204 --------------------- > 4 files changed, 397 insertions(+), 204 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml > @@ -0,0 +1,140 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale Elo DMA Controller > + > +maintainers: > + - J. Neuschäfer <j.ne@posteo.net> > + > +description: > + This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx > + series chips such as mpc8315, mpc8349, mpc8379 etc. > + > +properties: > + compatible: > + items: > + - enum: > + - fsl,mpc8313-dma > + - fsl,mpc8315-dma > + - fsl,mpc8323-dma > + - fsl,mpc8347-dma > + - fsl,mpc8349-dma > + - fsl,mpc8360-dma > + - fsl,mpc8377-dma > + - fsl,mpc8378-dma > + - fsl,mpc8379-dma > + - const: fsl,elo-dma > + > + reg: > + maxItems: 1 > + description: > + DMA General Status Register, i.e. DGSR which contains status for > + all the 4 DMA channels. needn't maxItems items: - description: DMA ... > + > + cell-index: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Controller index. 0 for controller @ 0x8100. > + > + ranges: true > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + interrupts: > + maxItems: 1 > + description: Controller interrupt. Needn't description because no any additional informaiton. > + > +required: > + - compatible > + - reg > + > +patternProperties: > + "^dma-channel@.*$": > + type: object > + additionalProperties: false > + > + properties: > + compatible: > + oneOf: > + # native DMA channel > + - items: > + - enum: > + - fsl,mpc8315-dma-channel > + - fsl,mpc8323-dma-channel > + - fsl,mpc8347-dma-channel > + - fsl,mpc8349-dma-channel > + - fsl,mpc8360-dma-channel > + - fsl,mpc8377-dma-channel > + - fsl,mpc8378-dma-channel > + - fsl,mpc8379-dma-channel > + - const: fsl,elo-dma-channel > + > + # audio DMA channel, see fsl,ssi.yaml > + - const: fsl,ssi-dma-channel > + > + reg: > + maxItems: 1 > + > + cell-index: > + description: DMA channel index starts at 0. > + > + interrupts: > + maxItems: 1 > + description: > + Per-channel interrupt. Only necessary if no controller interrupt has > + been provided. > + > +additionalProperties: false Need ref to dma-common.yaml? > + > +examples: > + - | > + dma@82a8 { > + compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; > + reg = <0x82a8 4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x8100 0x1a4>; > + interrupt-parent = <&ipic>; > + interrupts = <71 8>; > + cell-index = <0>; > + > + dma-channel@0 { > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; > + reg = <0 0x80>; > + cell-index = <0>; > + interrupt-parent = <&ipic>; > + interrupts = <71 8>; '8', use predefine MACRO for irq type. Frank > + }; > + > + dma-channel@80 { > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; > + reg = <0x80 0x80>; > + cell-index = <1>; > + interrupt-parent = <&ipic>; > + interrupts = <71 8>; > + }; > + > + dma-channel@100 { > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; > + reg = <0x100 0x80>; > + cell-index = <2>; > + interrupt-parent = <&ipic>; > + interrupts = <71 8>; > + }; > + > + dma-channel@180 { > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; > + reg = <0x180 0x80>; > + cell-index = <3>; > + interrupt-parent = <&ipic>; > + interrupts = <71 8>; > + }; > + }; > + ... > -- > 2.48.0.rc1.219.gb6b6757d772 > >
On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer wrote: > The devicetree bindings for Freescale DMA engines have so far existed as > a text file. This patch converts them to YAML, and specifies all the > compatible strings currently in use in arch/powerpc/boot/dts. > > Signed-off-by: J. Neuschäfer <j.ne@posteo.net> > --- > > V2: > - remove unnecessary multiline markers > - fix additionalProperties to always be false > - add description/maxItems to interrupts > - add missing #address-cells/#size-cells properties > - convert "Note on DMA channel compatible properties" to YAML by listing > fsl,ssi-dma-channel as a valid compatible value > - fix property ordering in examples: compatible and reg come first > - add missing newlines in examples > - trim subject line (remove "bindings") > --- > .../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++ > .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++ > .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++ > .../devicetree/bindings/powerpc/fsl/dma.txt | 204 --------------------- > 4 files changed, 397 insertions(+), 204 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml > @@ -0,0 +1,140 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale Elo DMA Controller > + > +maintainers: > + - J. Neuschäfer <j.ne@posteo.net> > + > +description: > + This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx > + series chips such as mpc8315, mpc8349, mpc8379 etc. > + > +properties: > + compatible: > + items: > + - enum: > + - fsl,mpc8313-dma > + - fsl,mpc8315-dma > + - fsl,mpc8323-dma > + - fsl,mpc8347-dma > + - fsl,mpc8349-dma > + - fsl,mpc8360-dma > + - fsl,mpc8377-dma > + - fsl,mpc8378-dma > + - fsl,mpc8379-dma > + - const: fsl,elo-dma > + > + reg: > + maxItems: 1 > + description: > + DMA General Status Register, i.e. DGSR which contains status for > + all the 4 DMA channels. > + > + cell-index: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Controller index. 0 for controller @ 0x8100. > + > + ranges: true > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + interrupts: > + maxItems: 1 > + description: Controller interrupt. > + > +required: > + - compatible > + - reg > + > +patternProperties: > + "^dma-channel@.*$": You need to define the unit-address format. > + type: object > + additionalProperties: false > + > + properties: > + compatible: > + oneOf: > + # native DMA channel > + - items: > + - enum: > + - fsl,mpc8315-dma-channel > + - fsl,mpc8323-dma-channel > + - fsl,mpc8347-dma-channel > + - fsl,mpc8349-dma-channel > + - fsl,mpc8360-dma-channel > + - fsl,mpc8377-dma-channel > + - fsl,mpc8378-dma-channel > + - fsl,mpc8379-dma-channel > + - const: fsl,elo-dma-channel > + > + # audio DMA channel, see fsl,ssi.yaml > + - const: fsl,ssi-dma-channel > + > + reg: > + maxItems: 1 > + > + cell-index: > + description: DMA channel index starts at 0. > + > + interrupts: > + maxItems: 1 > + description: > + Per-channel interrupt. Only necessary if no controller interrupt has > + been provided. > + > +additionalProperties: false > + > +examples: > + - | > + dma@82a8 { dma-controller@... > + compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; > + reg = <0x82a8 4>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x8100 0x1a4>; > + interrupt-parent = <&ipic>; Drop interrupt-parent everywhere. > + interrupts = <71 8>; > + cell-index = <0>; > + > + dma-channel@0 { > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; > + reg = <0 0x80>; > + cell-index = <0>; > + interrupt-parent = <&ipic>; > + interrupts = <71 8>; > + }; > + > + dma-channel@80 { > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; > + reg = <0x80 0x80>; > + cell-index = <1>; > + interrupt-parent = <&ipic>; > + interrupts = <71 8>; > + }; > + > + dma-channel@100 { > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; > + reg = <0x100 0x80>; > + cell-index = <2>; > + interrupt-parent = <&ipic>; > + interrupts = <71 8>; > + }; > + > + dma-channel@180 { > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; > + reg = <0x180 0x80>; > + cell-index = <3>; > + interrupt-parent = <&ipic>; > + interrupts = <71 8>; > + }; > + }; > + > +... Similar comments on the others. Rob
On Mon, Feb 10, 2025 at 02:39:13PM -0500, Frank Li wrote: > On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer via B4 Relay wrote: > > From: "J. Neuschäfer" <j.ne@posteo.net> > > > > The devicetree bindings for Freescale DMA engines have so far existed as > > a text file. This patch converts them to YAML, and specifies all the > > compatible strings currently in use in arch/powerpc/boot/dts. > > > > Signed-off-by: J. Neuschäfer <j.ne@posteo.net> > > --- > > > > V2: > > - remove unnecessary multiline markers > > - fix additionalProperties to always be false > > - add description/maxItems to interrupts > > - add missing #address-cells/#size-cells properties > > - convert "Note on DMA channel compatible properties" to YAML by listing > > fsl,ssi-dma-channel as a valid compatible value > > - fix property ordering in examples: compatible and reg come first > > - add missing newlines in examples > > - trim subject line (remove "bindings") > > --- > > .../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++ > > .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++ > > .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++ > > .../devicetree/bindings/powerpc/fsl/dma.txt | 204 --------------------- > > 4 files changed, 397 insertions(+), 204 deletions(-) [...] > > + reg: > > + maxItems: 1 > > + description: > > + DMA General Status Register, i.e. DGSR which contains status for > > + all the 4 DMA channels. > > needn't maxItems > items: > - description: DMA ... Good point, I'll do that. > > > + > > + cell-index: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: Controller index. 0 for controller @ 0x8100. > > + > > + ranges: true > > + > > + "#address-cells": > > + const: 1 > > + > > + "#size-cells": > > + const: 1 > > + > > + interrupts: > > + maxItems: 1 > > + description: Controller interrupt. > > Needn't description because no any additional informaiton. True. > > > + > > +required: > > + - compatible > > + - reg [...] > > +additionalProperties: false > > Need ref to dma-common.yaml? Sounds good, but I'm not sure what to do about the #dma-cells property, which is required by dma-common.yaml. There aren't many examples of DMA channels being explicitly declared in device trees. One example that I could find is the the xilinx_dma.txt binding: axi_vdma_0: axivdma@40030000 { compatible = "xlnx,axi-vdma-1.00.a"; #dma_cells = <1>; reg = < 0x40030000 0x10000 >; dma-ranges = <0x00000000 0x00000000 0x40000000>; xlnx,num-fstores = <0x8>; xlnx,flush-fsync = <0x1>; xlnx,addrwidth = <0x20>; clocks = <&clk 0>, <&clk 1>, <&clk 2>, <&clk 3>, <&clk 4>; clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk", "m_axis_mm2s_aclk", "s_axis_s2mm_aclk"; dma-channel@40030000 { compatible = "xlnx,axi-vdma-mm2s-channel"; interrupts = < 0 54 4 >; xlnx,datawidth = <0x40>; }; dma-channel@40030030 { compatible = "xlnx,axi-vdma-s2mm-channel"; interrupts = < 0 53 4 >; xlnx,datawidth = <0x40>; }; }; ... vdmatest_0: vdmatest@0 { compatible ="xlnx,axi-vdma-test-1.00.a"; dmas = <&axi_vdma_0 0 &axi_vdma_0 1>; dma-names = "vdma0", "vdma1"; }; It has #dma_cells (I'm sure #dma-cells was intended) on the controller. Another example is in arch/powerpc/boot/dts/fsl/p1022si-post.dtsi: dma@c300 { dma00: dma-channel@0 { compatible = "fsl,ssi-dma-channel"; }; dma01: dma-channel@80 { compatible = "fsl,ssi-dma-channel"; }; }; ... ssi@15000 { compatible = "fsl,mpc8610-ssi"; cell-index = <0>; reg = <0x15000 0x100>; interrupts = <75 2 0 0>; fsl,playback-dma = <&dma00>; fsl,capture-dma = <&dma01>; fsl,fifo-depth = <15>; }; There, the DMA channels are used directly and without additional information (i.e. #dma-cells = <0>, althought it isn't specified). > > + dma-channel@0 { > > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; > > + reg = <0 0x80>; > > + cell-index = <0>; > > + interrupt-parent = <&ipic>; > > + interrupts = <71 8>; > > '8', use predefine MACRO for irq type. Good catch, will do > > Frank Thanks for your review! J. Neuschäfer
diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml new file mode 100644 index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Elo DMA Controller + +maintainers: + - J. Neuschäfer <j.ne@posteo.net> + +description: + This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx + series chips such as mpc8315, mpc8349, mpc8379 etc. + +properties: + compatible: + items: + - enum: + - fsl,mpc8313-dma + - fsl,mpc8315-dma + - fsl,mpc8323-dma + - fsl,mpc8347-dma + - fsl,mpc8349-dma + - fsl,mpc8360-dma + - fsl,mpc8377-dma + - fsl,mpc8378-dma + - fsl,mpc8379-dma + - const: fsl,elo-dma + + reg: + maxItems: 1 + description: + DMA General Status Register, i.e. DGSR which contains status for + all the 4 DMA channels. + + cell-index: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Controller index. 0 for controller @ 0x8100. + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + interrupts: + maxItems: 1 + description: Controller interrupt. + +required: + - compatible + - reg + +patternProperties: + "^dma-channel@.*$": + type: object + additionalProperties: false + + properties: + compatible: + oneOf: + # native DMA channel + - items: + - enum: + - fsl,mpc8315-dma-channel + - fsl,mpc8323-dma-channel + - fsl,mpc8347-dma-channel + - fsl,mpc8349-dma-channel + - fsl,mpc8360-dma-channel + - fsl,mpc8377-dma-channel + - fsl,mpc8378-dma-channel + - fsl,mpc8379-dma-channel + - const: fsl,elo-dma-channel + + # audio DMA channel, see fsl,ssi.yaml + - const: fsl,ssi-dma-channel + + reg: + maxItems: 1 + + cell-index: + description: DMA channel index starts at 0. + + interrupts: + maxItems: 1 + description: + Per-channel interrupt. Only necessary if no controller interrupt has + been provided. + +additionalProperties: false + +examples: + - | + dma@82a8 { + compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x8100 0x1a4>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + + dma-channel@0 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + cell-index = <0>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + + dma-channel@80 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + + dma-channel@100 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + + dma-channel@180 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml new file mode 100644 index 0000000000000000000000000000000000000000..36865836b48af78af32d4e11f55a32e32771a23e --- /dev/null +++ b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Elo3 DMA Controller + +maintainers: + - J. Neuschäfer <j.ne@posteo.net> + +description: + DMA controller which has same function as EloPlus except that Elo3 has 8 + channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx + series chips, such as t1040, t4240, b4860. + +properties: + compatible: + const: fsl,elo3-dma + + reg: + maxItems: 2 + description: + contains two entries for DMA General Status Registers, i.e. DGSR0 which + includes status for channel 1~4, and DGSR1 for channel 5~8 + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + interrupts: + maxItems: 1 + description: Controller interrupt. + +patternProperties: + "^dma-channel@.*$": + type: object + additionalProperties: false + + properties: + compatible: + enum: + # native DMA channel + - fsl,eloplus-dma-channel + + # audio DMA channel, see fsl,ssi.yaml + - fsl,ssi-dma-channel + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: + Per-channel interrupt. Only necessary if no controller interrupt has + been provided. + +additionalProperties: false + +examples: + - | + dma@100300 { + compatible = "fsl,elo3-dma"; + reg = <0x100300 0x4>, + <0x100600 0x4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x100100 0x500>; + + dma-channel@0 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + interrupts = <28 2 0 0>; + }; + + dma-channel@80 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + interrupts = <29 2 0 0>; + }; + + dma-channel@100 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + interrupts = <30 2 0 0>; + }; + + dma-channel@180 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + interrupts = <31 2 0 0>; + }; + + dma-channel@300 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x300 0x80>; + interrupts = <76 2 0 0>; + }; + + dma-channel@380 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x380 0x80>; + interrupts = <77 2 0 0>; + }; + + dma-channel@400 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x400 0x80>; + interrupts = <78 2 0 0>; + }; + + dma-channel@480 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x480 0x80>; + interrupts = <79 2 0 0>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml new file mode 100644 index 0000000000000000000000000000000000000000..513fee051657832dc031d32c1f701bf7c3b89daa --- /dev/null +++ b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/fsl,eloplus-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale EloPlus DMA Controller + +maintainers: + - J. Neuschäfer <j.ne@posteo.net> + +description: + This is a 4-channel DMA controller with extended addresses and chaining, + mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as + mpc8540, mpc8641 p4080, bsc9131 etc. + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,mpc8540-dma + - fsl,mpc8541-dma + - fsl,mpc8548-dma + - fsl,mpc8555-dma + - fsl,mpc8560-dma + - fsl,mpc8572-dma + - fsl,mpc8641-dma + - const: fsl,eloplus-dma + - const: fsl,eloplus-dma + + reg: + maxItems: 1 + description: + DMA General Status Register, i.e. DGSR which contains + status for all the 4 DMA channels + + cell-index: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + controller index. 0 for controller @ 0x21000, 1 for controller @ 0xc000 + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + interrupts: + maxItems: 1 + description: Controller interrupt. + +patternProperties: + "^dma-channel@.*$": + type: object + additionalProperties: false + + properties: + compatible: + oneOf: + # native DMA channel + - items: + - enum: + - fsl,mpc8540-dma-channel + - fsl,mpc8541-dma-channel + - fsl,mpc8548-dma-channel + - fsl,mpc8555-dma-channel + - fsl,mpc8560-dma-channel + - fsl,mpc8572-dma-channel + - const: fsl,eloplus-dma-channel + + # audio DMA channel, see fsl,ssi.yaml + - const: fsl,ssi-dma-channel + + reg: + maxItems: 1 + + cell-index: + description: DMA channel index starts at 0. + + interrupts: + maxItems: 1 + description: + Per-channel interrupt. Only necessary if no controller interrupt has + been provided. + +additionalProperties: false + +examples: + - | + dma@21300 { + compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; + reg = <0x21300 4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x21100 0x200>; + cell-index = <0>; + + dma-channel@0 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + + dma-channel@80 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + + dma-channel@100 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + + dma-channel@180 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt deleted file mode 100644 index c11ad5c6db2190bf38c160632d9997122e169945..0000000000000000000000000000000000000000 --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt +++ /dev/null @@ -1,204 +0,0 @@ -* Freescale DMA Controllers - -** Freescale Elo DMA Controller - This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx - series chips such as mpc8315, mpc8349, mpc8379 etc. - -Required properties: - -- compatible : must include "fsl,elo-dma" -- reg : DMA General Status Register, i.e. DGSR which contains - status for all the 4 DMA channels -- ranges : describes the mapping between the address space of the - DMA channels and the address space of the DMA controller -- cell-index : controller index. 0 for controller @ 0x8100 -- interrupts : interrupt specifier for DMA IRQ - -- DMA channel nodes: - - compatible : must include "fsl,elo-dma-channel" - However, see note below. - - reg : DMA channel specific registers - - cell-index : DMA channel index starts at 0. - -Optional properties: - - interrupts : interrupt specifier for DMA channel IRQ - (on 83xx this is expected to be identical to - the interrupts property of the parent node) - -Example: - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a4>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - cell-index = <0>; - reg = <0 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - cell-index = <1>; - reg = <0x80 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - cell-index = <2>; - reg = <0x100 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - cell-index = <3>; - reg = <0x180 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - -** Freescale EloPlus DMA Controller - This is a 4-channel DMA controller with extended addresses and chaining, - mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as - mpc8540, mpc8641 p4080, bsc9131 etc. - -Required properties: - -- compatible : must include "fsl,eloplus-dma" -- reg : DMA General Status Register, i.e. DGSR which contains - status for all the 4 DMA channels -- cell-index : controller index. 0 for controller @ 0x21000, - 1 for controller @ 0xc000 -- ranges : describes the mapping between the address space of the - DMA channels and the address space of the DMA controller - -- DMA channel nodes: - - compatible : must include "fsl,eloplus-dma-channel" - However, see note below. - - cell-index : DMA channel index starts at 0. - - reg : DMA channel specific registers - - interrupts : interrupt specifier for DMA channel IRQ - -Example: - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; - reg = <0x21300 4>; - ranges = <0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - -** Freescale Elo3 DMA Controller - DMA controller which has same function as EloPlus except that Elo3 has 8 - channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx - series chips, such as t1040, t4240, b4860. - -Required properties: - -- compatible : must include "fsl,elo3-dma" -- reg : contains two entries for DMA General Status Registers, - i.e. DGSR0 which includes status for channel 1~4, and - DGSR1 for channel 5~8 -- ranges : describes the mapping between the address space of the - DMA channels and the address space of the DMA controller - -- DMA channel nodes: - - compatible : must include "fsl,eloplus-dma-channel" - - reg : DMA channel specific registers - - interrupts : interrupt specifier for DMA channel IRQ - -Example: -dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elo3-dma"; - reg = <0x100300 0x4>, - <0x100600 0x4>; - ranges = <0x0 0x100100 0x500>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - interrupts = <31 2 0 0>; - }; - dma-channel@300 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x300 0x80>; - interrupts = <76 2 0 0>; - }; - dma-channel@380 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x380 0x80>; - interrupts = <77 2 0 0>; - }; - dma-channel@400 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x400 0x80>; - interrupts = <78 2 0 0>; - }; - dma-channel@480 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x480 0x80>; - interrupts = <79 2 0 0>; - }; -}; - -Note on DMA channel compatible properties: The compatible property must say -"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA -driver (fsldma). Any DMA channel used by fsldma cannot be used by another -DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA -channel that should be used for another driver should not use -"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for -example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt -for more information.