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[5/7] PCI: apple: Drop poll for CORE_RC_PHYIF_STAT_REFCLK

Message ID 20250211-pcie-t6-v1-5-b60e6d2501bb@rosenzweig.io (mailing list archive)
State New
Delegated to: Krzysztof Wilczyński
Headers show
Series PCI: apple: support t6020 | expand

Commit Message

Alyssa Rosenzweig Feb. 11, 2025, 7:54 p.m. UTC 
From: Hector Martin <marcan@marcan.st>

This is checking a core refclk in per-port setup which doesn't make a
lot of sense, and the bootloader needs to have gone through this anyway.

It doesn't work on T602x, so just drop it across the board.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
---
 drivers/pci/controller/pcie-apple.c | 6 ------
 1 file changed, 6 deletions(-)
diff mbox series

Patch

diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c
index 806eeb911bbd4f1ae5832b34f775fa18c866670b..209535db7855fa1ee0d75290b33525dce18f560d 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -472,12 +472,6 @@  static int apple_pcie_setup_refclk(struct apple_pcie *pcie,
 	u32 stat;
 	int res;
 
-	res = readl_relaxed_poll_timeout(pcie->base + CORE_RC_PHYIF_STAT, stat,
-					 stat & CORE_RC_PHYIF_STAT_REFCLK,
-					 100, 50000);
-	if (res < 0)
-		return res;
-
 	rmw_set(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL);
 	rmw_set(PHY_LANE_CFG_REFCLK0REQ, port->phy + PHY_LANE_CFG);