Message ID | 20250215155359.321513-3-matthew.gerlach@linux.intel.com (mailing list archive) |
---|---|
State | New |
Delegated to: | Krzysztof WilczyĆski |
Headers | show |
Series | Add PCIe Root Port support for Agilex family of chips | expand |
On Sat, Feb 15, 2025 at 09:53:54AM -0600, Matthew Gerlach wrote: > The Agilex7f devkit can support PCIe End Points with the appropriate > daughter card. > > Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > --- > v7: > - New patch to series. > --- > Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml > index 2ee0c740eb56..0da5810c9510 100644 > --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml > +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml > @@ -20,6 +20,7 @@ properties: > - intel,n5x-socdk > - intel,socfpga-agilex-n6000 > - intel,socfpga-agilex-socdk > + - intel,socfpga-agilex7f-socdk-pcie-root-port Compatible should represent the board, so what is here exactly the board? 7f? Agilex7f? socdk? Or is it standard agilex-socdk but with some things attached? But then, are they attached or you just creat the same board with different configuration? Best regards, Krzysztof
On Sun, 16 Feb 2025, Krzysztof Kozlowski wrote: > On Sat, Feb 15, 2025 at 09:53:54AM -0600, Matthew Gerlach wrote: >> The Agilex7f devkit can support PCIe End Points with the appropriate >> daughter card. >> >> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> --- >> v7: >> - New patch to series. >> --- >> Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml >> index 2ee0c740eb56..0da5810c9510 100644 >> --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml >> +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml >> @@ -20,6 +20,7 @@ properties: >> - intel,n5x-socdk >> - intel,socfpga-agilex-n6000 >> - intel,socfpga-agilex-socdk >> + - intel,socfpga-agilex7f-socdk-pcie-root-port > > Compatible should represent the board, so what is here exactly the > board? 7f? Agilex7f? socdk? Or is it standard agilex-socdk but with some > things attached? The board is the Agilex 7 FPGA F-Series Transceiver-Soc Development Kit: https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/si-agf014.html There is not a single, standard agilex-socdk board. There are currently three variants. In addition to the F-Series socdk, there are I-Series and M-Series devkits: https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/si-agi027.html https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agm039.html > > But then, are they attached or you just creat the same board with > different configuration? The PCIe Root Port does involve a different FPGA configuration, but depending on the board, daughter cards and possibly cables are also involved. > > Best regards, > Krzysztof > > Thanks for the feedback, Matthew Gerlach
On 17/02/2025 16:47, matthew.gerlach@linux.intel.com wrote: > > > On Sun, 16 Feb 2025, Krzysztof Kozlowski wrote: > >> On Sat, Feb 15, 2025 at 09:53:54AM -0600, Matthew Gerlach wrote: >>> The Agilex7f devkit can support PCIe End Points with the appropriate >>> daughter card. >>> >>> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> >>> --- >>> v7: >>> - New patch to series. >>> --- >>> Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml >>> index 2ee0c740eb56..0da5810c9510 100644 >>> --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml >>> +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml >>> @@ -20,6 +20,7 @@ properties: >>> - intel,n5x-socdk >>> - intel,socfpga-agilex-n6000 >>> - intel,socfpga-agilex-socdk >>> + - intel,socfpga-agilex7f-socdk-pcie-root-port >> >> Compatible should represent the board, so what is here exactly the >> board? 7f? Agilex7f? socdk? Or is it standard agilex-socdk but with some >> things attached? > > The board is the Agilex 7 FPGA F-Series Transceiver-Soc Development Kit: > https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/si-agf014.html Isn't Agilex7 a SoC? I don't see it in the list of compatibles. > > There is not a single, standard agilex-socdk board. There are currently > three variants. In addition to the F-Series socdk, there are I-Series and > M-Series devkits: > https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/si-agi027.html > https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agm039.html Pages above show distinctive names for the boards, so I am confused why they are not used. Best regards, Krzysztof
On Tue, 18 Feb 2025, Krzysztof Kozlowski wrote: > On 17/02/2025 16:47, matthew.gerlach@linux.intel.com wrote: >> >> >> On Sun, 16 Feb 2025, Krzysztof Kozlowski wrote: >> >>> On Sat, Feb 15, 2025 at 09:53:54AM -0600, Matthew Gerlach wrote: >>>> The Agilex7f devkit can support PCIe End Points with the appropriate >>>> daughter card. >>>> >>>> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> >>>> --- >>>> v7: >>>> - New patch to series. >>>> --- >>>> Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 + >>>> 1 file changed, 1 insertion(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml >>>> index 2ee0c740eb56..0da5810c9510 100644 >>>> --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml >>>> +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml >>>> @@ -20,6 +20,7 @@ properties: >>>> - intel,n5x-socdk >>>> - intel,socfpga-agilex-n6000 >>>> - intel,socfpga-agilex-socdk >>>> + - intel,socfpga-agilex7f-socdk-pcie-root-port >>> >>> Compatible should represent the board, so what is here exactly the >>> board? 7f? Agilex7f? socdk? Or is it standard agilex-socdk but with some >>> things attached? >> >> The board is the Agilex 7 FPGA F-Series Transceiver-Soc Development Kit: >> https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/si-agf014.html > > Isn't Agilex7 a SoC? I don't see it in the list of compatibles. There are actually 3 different variants of the Agilex7 SoC. > >> >> There is not a single, standard agilex-socdk board. There are currently >> three variants. In addition to the F-Series socdk, there are I-Series and >> M-Series devkits: >> https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/si-agi027.html >> https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agm039.html > > Pages above show distinctive names for the boards, so I am confused why > they are not used. Yes, the distinctive names of the boards should be used: - intel,socfpga-agilex7f-socdk - intel,socfpga-agilex7i-socdk - intel,socfpga-agilex7m-socdk > > > > Best regards, > Krzysztof > Thanks for the feedback, Matthew Gerlach
diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml index 2ee0c740eb56..0da5810c9510 100644 --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml @@ -20,6 +20,7 @@ properties: - intel,n5x-socdk - intel,socfpga-agilex-n6000 - intel,socfpga-agilex-socdk + - intel,socfpga-agilex7f-socdk-pcie-root-port - const: intel,socfpga-agilex - description: Agilex5 boards items:
The Agilex7f devkit can support PCIe End Points with the appropriate daughter card. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> --- v7: - New patch to series. --- Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 + 1 file changed, 1 insertion(+)