diff mbox series

[v2,2/3] dt-bindings: PCI: xilinx-pcie: Add reset-gpios for PERST#

Message ID 20250325071832.21229-2-mike.looijmans@topic.nl (mailing list archive)
State New
Delegated to: Krzysztof WilczyƄski
Headers show
Series [v2,1/3] pcie-xilinx: Wait for link-up status during initialization | expand

Commit Message

Mike Looijmans March 25, 2025, 7:18 a.m. UTC
Introduce optional `reset-gpios` property to enable GPIO-based control
of the PCIe root port PERST# signal, as described in pci.txt.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
---

Changes in v2:
Add binding for reset-gpios

 .../devicetree/bindings/pci/xlnx,axi-pcie-host.yaml          | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Krzysztof Kozlowski March 25, 2025, 8:17 a.m. UTC | #1
On Tue, Mar 25, 2025 at 08:18:26AM +0100, Mike Looijmans wrote:
> Introduce optional `reset-gpios` property to enable GPIO-based control
> of the PCIe root port PERST# signal, as described in pci.txt.

Drop pci.txt, we don't use TXT bindings anymore.

> 
> Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
> ---
> 
> Changes in v2:
> Add binding for reset-gpios

So what was in v1? Empty patch?


> 
>  .../devicetree/bindings/pci/xlnx,axi-pcie-host.yaml          | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
> index fb87b960a250..2b0fabdd5e16 100644
> --- a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
> @@ -28,6 +28,9 @@ properties:
>            ranges for the PCI memory regions (I/O space region is not
>            supported by hardware)
>  
> +  reset-gpios:
> +    maxItems: 1

Why do you need it? It's already there, in PCI schemas, isn't it?

Why is this patch needed?

Best regards,
Krzysztof
Mike Looijmans March 26, 2025, 11:57 a.m. UTC | #2
On 25-03-2025 09:17, Krzysztof Kozlowski wrote:
> On Tue, Mar 25, 2025 at 08:18:26AM +0100, Mike Looijmans wrote:
>> Introduce optional `reset-gpios` property to enable GPIO-based control
>> of the PCIe root port PERST# signal, as described in pci.txt.
> Drop pci.txt, we don't use TXT bindings anymore.
>
>> Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
>> ---
>>
>> Changes in v2:
>> Add binding for reset-gpios
> So what was in v1? Empty patch?

Feedback on v1 was that I had to add bindings documentation...


>>   .../devicetree/bindings/pci/xlnx,axi-pcie-host.yaml          | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
>> index fb87b960a250..2b0fabdd5e16 100644
>> --- a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
>> +++ b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
>> @@ -28,6 +28,9 @@ properties:
>>             ranges for the PCI memory regions (I/O space region is not
>>             supported by hardware)
>>   
>> +  reset-gpios:
>> +    maxItems: 1
> Why do you need it? It's already there, in PCI schemas, isn't it?
>
> Why is this patch needed?

Apparently not needed then, sorry for the noise.



>
> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
index fb87b960a250..2b0fabdd5e16 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml
@@ -28,6 +28,9 @@  properties:
           ranges for the PCI memory regions (I/O space region is not
           supported by hardware)
 
+  reset-gpios:
+    maxItems: 1
+
   "#interrupt-cells":
     const: 1
 
@@ -63,6 +66,7 @@  unevaluatedProperties: false
 
 examples:
   - |
+    #include <dt-bindings/gpio/gpio.h>
     #include <dt-bindings/interrupt-controller/arm-gic.h>
     #include <dt-bindings/interrupt-controller/irq.h>
 
@@ -80,6 +84,7 @@  examples:
                         <0 0 0 3 &pcie_intc 3>,
                         <0 0 0 4 &pcie_intc 4>;
         ranges = <0x02000000 0 0x60000000 0x60000000 0 0x10000000>;
+        reset-gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
         pcie_intc: interrupt-controller {
             interrupt-controller;
             #address-cells = <0>;