| Message ID | 20250326075915.4073725-4-hongxing.zhu@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Krzysztof Wilczyński |
| Headers | show |
| Series | Add some enhancements for i.MX95 PCIe | expand |
On Wed, Mar 26, 2025 at 03:59:12PM +0800, Richard Zhu wrote: > ERR051624: The Controller Without Vaux Cannot Exit L23 Ready Through Beacon > or PERST# De-assertion > > When the auxiliary power is not available, the controller cannot exit from > L23 Ready with beacon or PERST# de-assertion when main power is not > removed. > > Workaround: Set SS_RW_REG_1[SYS_AUX_PWR_DET] to 1. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> > --- > drivers/pci/controller/dwc/pci-imx6.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 13e53311cc0e..fbab5a4621aa 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -48,6 +48,8 @@ > #define IMX95_PCIE_SS_RW_REG_0 0xf0 > #define IMX95_PCIE_REF_CLKEN BIT(23) > #define IMX95_PCIE_PHY_CR_PARA_SEL BIT(9) > +#define IMX95_PCIE_SS_RW_REG_1 0xf4 > +#define IMX95_PCIE_SYS_AUX_PWR_DET BIT(31) > > #define IMX95_PE0_GEN_CTRL_1 0x1050 > #define IMX95_PCIE_DEVICE_TYPE GENMASK(3, 0) > @@ -227,6 +229,19 @@ static unsigned int imx_pcie_grp_offset(const struct imx_pcie *imx_pcie) > > static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie) > { > + /* > + * ERR051624: The Controller Without Vaux Cannot Exit L23 Ready > + * Through Beacon or PERST# De-assertion > + * > + * When the auxiliary power is not available, the controller > + * cannot exit from L23 Ready with beacon or PERST# de-assertion > + * when main power is not removed. > + * > + * Workaround: Set SS_RW_REG_1[SYS_AUX_PWR_DET] to 1. > + */ > + regmap_set_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_SS_RW_REG_1, > + IMX95_PCIE_SYS_AUX_PWR_DET); > + > regmap_update_bits(imx_pcie->iomuxc_gpr, > IMX95_PCIE_SS_RW_REG_0, > IMX95_PCIE_PHY_CR_PARA_SEL, > -- > 2.37.1 >
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 13e53311cc0e..fbab5a4621aa 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -48,6 +48,8 @@ #define IMX95_PCIE_SS_RW_REG_0 0xf0 #define IMX95_PCIE_REF_CLKEN BIT(23) #define IMX95_PCIE_PHY_CR_PARA_SEL BIT(9) +#define IMX95_PCIE_SS_RW_REG_1 0xf4 +#define IMX95_PCIE_SYS_AUX_PWR_DET BIT(31) #define IMX95_PE0_GEN_CTRL_1 0x1050 #define IMX95_PCIE_DEVICE_TYPE GENMASK(3, 0) @@ -227,6 +229,19 @@ static unsigned int imx_pcie_grp_offset(const struct imx_pcie *imx_pcie) static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie) { + /* + * ERR051624: The Controller Without Vaux Cannot Exit L23 Ready + * Through Beacon or PERST# De-assertion + * + * When the auxiliary power is not available, the controller + * cannot exit from L23 Ready with beacon or PERST# de-assertion + * when main power is not removed. + * + * Workaround: Set SS_RW_REG_1[SYS_AUX_PWR_DET] to 1. + */ + regmap_set_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_SS_RW_REG_1, + IMX95_PCIE_SYS_AUX_PWR_DET); + regmap_update_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_SS_RW_REG_0, IMX95_PCIE_PHY_CR_PARA_SEL,
ERR051624: The Controller Without Vaux Cannot Exit L23 Ready Through Beacon or PERST# De-assertion When the auxiliary power is not available, the controller cannot exit from L23 Ready with beacon or PERST# de-assertion when main power is not removed. Workaround: Set SS_RW_REG_1[SYS_AUX_PWR_DET] to 1. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)