| Message ID | 20250411103656.2740517-7-hans.zhang@cixtech.com (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Krzysztof Wilczyński |
| Headers | show |
| Series | Enhance the PCIe controller driver | expand |
On Fri, Apr 11, 2025 at 06:36:56PM +0800, hans.zhang@cixtech.com wrote: > From: Manikandan K Pillai <mpillai@cadence.com> > > Update the support for TI J721 boards to use the updated Cadence > PCIe controller code. Without this patch, you just broke TI. That's not bisectable. > > Signed-off-by: Manikandan K Pillai <mpillai@cadence.com> > Signed-off-by: Hans Zhang <hans.zhang@cixtech.com> > --- > drivers/pci/controller/cadence/pci-j721e.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+)
>Subject: Re: [PATCH v3 6/6] PCI: cadence: Update support for TI J721e boards > >EXTERNAL MAIL > > >On Fri, Apr 11, 2025 at 06:36:56PM +0800, hans.zhang@cixtech.com wrote: >> From: Manikandan K Pillai <mpillai@cadence.com> >> >> Update the support for TI J721 boards to use the updated Cadence >> PCIe controller code. > >Without this patch, you just broke TI. That's not bisectable. > Ok will merge this patch with the earlier one. >> >> Signed-off-by: Manikandan K Pillai <mpillai@cadence.com> >> Signed-off-by: Hans Zhang <hans.zhang@cixtech.com> >> --- >> drivers/pci/controller/cadence/pci-j721e.c | 12 ++++++++++++ >> 1 file changed, 12 insertions(+)
diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index ef1cfdae33bb..154b36c30101 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -164,6 +164,14 @@ static const struct cdns_pcie_ops j721e_pcie_ops = { .start_link = j721e_pcie_start_link, .stop_link = j721e_pcie_stop_link, .link_up = j721e_pcie_link_up, + .host_init_root_port = cdns_pcie_host_init_root_port, + .host_bar_ib_config = cdns_pcie_host_bar_ib_config, + .host_init_address_translation = cdns_pcie_host_init_address_translation, + .detect_quiet_min_delay_set = cdns_pcie_detect_quiet_min_delay_set, + .set_outbound_region = cdns_pcie_set_outbound_region, + .set_outbound_region_for_normal_msg = + cdns_pcie_set_outbound_region_for_normal_msg, + .reset_outbound_region = cdns_pcie_reset_outbound_region, }; static int j721e_pcie_set_mode(struct j721e_pcie *pcie, struct regmap *syscon, @@ -479,6 +487,8 @@ static int j721e_pcie_probe(struct platform_device *pdev) cdns_pcie = &rc->pcie; cdns_pcie->dev = dev; + cdns_pcie->is_rc = true; + cdns_pcie->is_hpa = false; cdns_pcie->ops = &j721e_pcie_ops; pcie->cdns_pcie = cdns_pcie; break; @@ -495,6 +505,8 @@ static int j721e_pcie_probe(struct platform_device *pdev) cdns_pcie = &ep->pcie; cdns_pcie->dev = dev; + cdns_pcie->is_rc = false; + cdns_pcie->is_hpa = false; cdns_pcie->ops = &j721e_pcie_ops; pcie->cdns_pcie = cdns_pcie; break;