diff mbox

PCI: Always set prefetchable base/limit upper32 registers

Message ID 4B147EE0.8080209@kernel.org (mailing list archive)
State Superseded, archived
Headers show

Commit Message

Yinghai Lu Dec. 1, 2009, 2:26 a.m. UTC
None
diff mbox

Patch

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -397,10 +397,17 @@  static void pci_bridge_check_ranges(stru
 		pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
 					       0xffffffff);
 		pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);
-		if (!tmp)
+		if (!tmp) {
 			b_res[2].flags &= ~IORESOURCE_MEM_64;
-		pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
-				       mem_base_hi);
+			dev_info(&bridge->dev, "%pR MEM_64 clearred\n", &b_res[2]);
+			/* not sure if we can clear it */
+			pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
+						 0);
+			pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32,
+						 0);
+		} else
+			pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
+					       mem_base_hi);
 	}
 }