@@ -400,6 +400,10 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev,
*io_base = range.cpu_addr;
} else if (resource_type(res) == IORESOURCE_MEM) {
res->flags &= ~IORESOURCE_MEM_64;
+
+ if (!(res->flags & IORESOURCE_PREFETCH))
+ if (upper_32_bits(range.pci_addr + range.size - 1))
+ dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
}
pci_add_resource_offset(resources, res, res->start - range.pci_addr);
@@ -619,10 +623,6 @@ static int pci_parse_request_of_pci_ranges(struct device *dev,
case IORESOURCE_MEM:
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
- if (!(res->flags & IORESOURCE_PREFETCH))
- if (upper_32_bits(resource_size(res)))
- dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
-
break;
}
}
Subject: [v2 PATCH 1/1] PCI: of: avoid warning for 4 GiB non-prefetchable windows. According to the PCIe spec (PCIe r6.3, sec 7.5.1.3.8), non-prefetchable memory supports only 32-bit host bridge windows (both base address as limit address). In the kernel there is a check that prints a warning if a non-prefetchable resource's size exceeds the 32-bit limit. The check currently checks the size of the resource, while actually the check should be done on the PCIe end address of the non-prefetchable window. Move the check to devm_of_pci_get_host_bridge_resources() where the PCIe addresses are available and use the end address instead of the size of the window to avoid warnings for 4 GiB windows. Signed-off-by: Wannes Bouwen <wannes.bouwen@nokia.com> --- drivers/pci/of.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)