diff mbox

[03/17] pci: Only allow WC mmap on prefetchable resources

Message ID a1b17c98858efd323fcd91a1e0898e8f0e45f442.1490188942.git.dwmw2@infradead.org (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show

Commit Message

David Woodhouse March 22, 2017, 1:25 p.m. UTC
From: David Woodhouse <dwmw@amazon.co.uk>

The /proc/bus/pci mmap interface allows the user to specify whether they
want WC or not. Don't let them do so on non-prefetchable BARs.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Cc: stable@vger.kernel.org
---
 drivers/pci/proc.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

Comments

Arnd Bergmann March 24, 2017, 4:05 p.m. UTC | #1
On Wed, Mar 22, 2017 at 2:25 PM, David Woodhouse <dwmw2@infradead.org> wrote:
> From: David Woodhouse <dwmw@amazon.co.uk>
>
> The /proc/bus/pci mmap interface allows the user to specify whether they
> want WC or not. Don't let them do so on non-prefetchable BARs.
>
> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
> Cc: stable@vger.kernel.org

Can you explain this a little more? I understand that we usually want to use
WC mappings on prefetchable BARs, and uncached non-WC on
non-prefetchable, but why do we have to force an error here?

Couldn't there be some hardware that allows write-combining access
but no prefetches?

       Arnd
David Woodhouse March 24, 2017, 5:04 p.m. UTC | #2
On Fri, 2017-03-24 at 17:05 +0100, Arnd Bergmann wrote:
> On Wed, Mar 22, 2017 at 2:25 PM, David Woodhouse <dwmw2@infradead.org> wrote:
> > 
> > From: David Woodhouse <dwmw@amazon.co.uk>
> > 
> > The /proc/bus/pci mmap interface allows the user to specify whether they
> > want WC or not. Don't let them do so on non-prefetchable BARs.
> > 
> > Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
> > Cc: stable@vger.kernel.org
> Can you explain this a little more? I understand that we usually want to use
> WC mappings on prefetchable BARs, and uncached non-WC on
> non-prefetchable, but why do we have to force an error here?
> 
> Couldn't there be some hardware that allows write-combining access
> but no prefetches?

Note that this is only for the procfs interface. The sysfs interface
already imposes the same restriction by just *not* creating the
'resourceX_wc' attr when the resource isn't prefetchable. So this just
brings procfs into line.
diff mbox

Patch

diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 62a0c3e..dc8912e 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -231,7 +231,7 @@  static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
 {
 	struct pci_dev *dev = PDE_DATA(file_inode(file));
 	struct pci_filp_private *fpriv = file->private_data;
-	int i, ret, write_combine, res_bit;
+	int i, ret, write_combine = 0, res_bit;
 
 	if (!capable(CAP_SYS_RAWIO))
 		return -EPERM;
@@ -251,10 +251,13 @@  static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
 	if (i >= PCI_ROM_RESOURCE)
 		return -ENODEV;
 
-	if (fpriv->mmap_state == pci_mmap_mem)
-		write_combine = fpriv->write_combine;
-	else
-		write_combine = 0;
+	if (fpriv->mmap_state == pci_mmap_mem &&
+	    fpriv->write_combine) {
+		if (dev->resource[i].flags & IORESOURCE_PREFETCH)
+			write_combine = 1;
+		else
+			return -EINVAL;
+	}
 	ret = pci_mmap_page_range(dev, vma,
 				  fpriv->mmap_state, write_combine);
 	if (ret < 0)