| Message ID | f787ca496eae2a0d5ff4f17655eaff9f39a14321.1618916235.git.baruch@tkos.co.il (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: IPQ6018 PCIe support | expand |
On Tue, 20 Apr 2021 14:21:39 +0300, Baruch Siach wrote: > Add ipq6018 qmp phy device for the single PCIe serdes lane on IPQ60xx > SoCs. > > Signed-off-by: Baruch Siach <baruch@tkos.co.il> > --- > .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml index 626447fee092..cb2eb7ac6d28 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml @@ -17,6 +17,7 @@ description: properties: compatible: enum: + - qcom,ipq6018-qmp-pcie-phy - qcom,ipq8074-qmp-pcie-phy - qcom,ipq8074-qmp-usb3-phy - qcom,msm8996-qmp-pcie-phy @@ -294,6 +295,30 @@ allOf: items: - const: phy - const: common + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-qmp-pcie-phy + then: + properties: + clocks: + items: + - description: Phy aux clock. + - description: Phy config clock. + clock-names: + items: + - const: aux + - const: cfg_ahb + resets: + items: + - description: reset of phy block. + - description: phy common block reset. + reset-names: + items: + - const: phy + - const: common - if: properties: compatible:
Add ipq6018 qmp phy device for the single PCIe serdes lane on IPQ60xx SoCs. Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+)