| Message ID | 20240203040515.23947-8-ricardo.neri-calderon@linux.intel.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | thermal: intel: hfi: Prework for the virtualization of HFI | expand |
On Fri, Feb 02, 2024 at 08:05:13PM -0800, Ricardo Neri wrote: > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index 8104f4791abd..3b42479c049d 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -326,6 +326,7 @@ > #define X86_FEATURE_FSRC (12*32+12) /* "" Fast short REP {CMPSB,SCASB} */ > #define X86_FEATURE_LKGS (12*32+18) /* "" Load "kernel" (userspace) GS */ > #define X86_FEATURE_AMX_FP16 (12*32+21) /* "" AMX fp16 Support */ > +#define X86_FEATURE_HRESET (12*32+22) /* Hardware history reset instruction */ #define X86_FEATURE_HRESET (12*32+22) /* "" Hardware history reset instruction */ unless this really needs to be visible in /proc/cpuinfo: Documentation/arch/x86/cpuinfo.rst
On Sat, Feb 03, 2024 at 10:36:22AM +0100, Borislav Petkov wrote: > On Fri, Feb 02, 2024 at 08:05:13PM -0800, Ricardo Neri wrote: > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > > index 8104f4791abd..3b42479c049d 100644 > > --- a/arch/x86/include/asm/cpufeatures.h > > +++ b/arch/x86/include/asm/cpufeatures.h > > @@ -326,6 +326,7 @@ > > #define X86_FEATURE_FSRC (12*32+12) /* "" Fast short REP {CMPSB,SCASB} */ > > #define X86_FEATURE_LKGS (12*32+18) /* "" Load "kernel" (userspace) GS */ > > #define X86_FEATURE_AMX_FP16 (12*32+21) /* "" AMX fp16 Support */ > > +#define X86_FEATURE_HRESET (12*32+22) /* Hardware history reset instruction */ > > #define X86_FEATURE_HRESET (12*32+22) /* "" Hardware history reset instruction */ > > unless this really needs to be visible in /proc/cpuinfo: > > Documentation/arch/x86/cpuinfo.rst Good point. There is no need to expose HRESET in /proc/cpuinfo. I will implement this change.
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 8104f4791abd..3b42479c049d 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -326,6 +326,7 @@ #define X86_FEATURE_FSRC (12*32+12) /* "" Fast short REP {CMPSB,SCASB} */ #define X86_FEATURE_LKGS (12*32+18) /* "" Load "kernel" (userspace) GS */ #define X86_FEATURE_AMX_FP16 (12*32+21) /* "" AMX fp16 Support */ +#define X86_FEATURE_HRESET (12*32+22) /* Hardware history reset instruction */ #define X86_FEATURE_AVX_IFMA (12*32+23) /* "" Support for VPMADD52[H,L]UQ */ #define X86_FEATURE_LAM (12*32+26) /* Linear Address Masking */ diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index d74932a0778d..65b1bfb9c304 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1155,6 +1155,9 @@ #define MSR_IA32_HW_FEEDBACK_CHAR 0x17d2 +/* Hardware History Reset */ +#define MSR_IA32_HW_HRESET_ENABLE 0x17da + /* x2APIC locked status */ #define MSR_IA32_XAPIC_DISABLE_STATUS 0xBD #define LEGACY_XAPIC_DISABLED BIT(0) /*
The HRESET instruction isolates the classification of individual tasks when they run sequentially on the same logical processor. It resets the classification history that the logical processor maintains. Cc: Len Brown <len.brown@intel.com> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Cc: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com> Cc: Zhao Liu <zhao1.liu@linux.intel.com> Cc: Zhuocheng Ding <zhuocheng.ding@intel.com> Cc: x86@kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> --- Patch cherry-picked from the IPC classes patchset. --- --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/msr-index.h | 3 +++ 2 files changed, 4 insertions(+)