diff mbox series

[8/9] x86/hreset: Configure history reset

Message ID 20240203040515.23947-9-ricardo.neri-calderon@linux.intel.com (mailing list archive)
State Changes Requested, archived
Headers show
Series thermal: intel: hfi: Prework for the virtualization of HFI | expand

Commit Message

Ricardo Neri Feb. 3, 2024, 4:05 a.m. UTC
Configure the MSR that controls the behavior of HRESET on each logical
processor.

Cc: Len Brown <len.brown@intel.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
Cc: Zhao Liu <zhao1.liu@linux.intel.com>
Cc: Zhuocheng Ding <zhuocheng.ding@intel.com>
Cc: x86@kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
Patch cherry-picked from the IPC classes patchset
---
---
 arch/x86/kernel/cpu/common.c | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

Comments

Borislav Petkov Feb. 3, 2024, 9:38 a.m. UTC | #1
On Fri, Feb 02, 2024 at 08:05:14PM -0800, Ricardo Neri wrote:
> +static __always_inline void setup_hreset(struct cpuinfo_x86 *c)
> +{
> +	if (!cpu_feature_enabled(X86_FEATURE_HRESET))
> +		return;
> +
> +	/*
> +	 * Use on all CPUs the hardware history features that the boot
> +	 * CPU supports.
> +	 */
> +	if (c == &boot_cpu_data)
> +		hardware_history_features = cpuid_ebx(0x20);

That's not what this does - that sets hardware_history_features on the
BSP.

Why isn't this whole thing called in bsp_init_intel()?
Ricardo Neri Feb. 4, 2024, 3:55 a.m. UTC | #2
On Sat, Feb 03, 2024 at 10:38:57AM +0100, Borislav Petkov wrote:
> On Fri, Feb 02, 2024 at 08:05:14PM -0800, Ricardo Neri wrote:
> > +static __always_inline void setup_hreset(struct cpuinfo_x86 *c)
> > +{
> > +	if (!cpu_feature_enabled(X86_FEATURE_HRESET))
> > +		return;
> > +
> > +	/*
> > +	 * Use on all CPUs the hardware history features that the boot
> > +	 * CPU supports.
> > +	 */
> > +	if (c == &boot_cpu_data)
> > +		hardware_history_features = cpuid_ebx(0x20);
> 
> That's not what this does - that sets hardware_history_features on the
> BSP.

I meant to say that we will use the features that the BSP supports and
use them to configure all other CPUs. I will reword the comment to make
this clear.

> 
> Why isn't this whole thing called in bsp_init_intel()?

The register MSR_IA32_HW_HRESET_ENABLE needs to be configured on each CPU.

I can set hardware_history_features from bsp_init_intel() but I still
need to call setup_hreset() on every CPU.
Borislav Petkov Feb. 4, 2024, 10:49 a.m. UTC | #3
On Sat, Feb 03, 2024 at 07:55:52PM -0800, Ricardo Neri wrote:
> I can set hardware_history_features from bsp_init_intel() but I still
> need to call setup_hreset() on every CPU.

init_intel() runs on every CPU.
Ricardo Neri Feb. 6, 2024, 2:37 a.m. UTC | #4
On Sun, Feb 04, 2024 at 11:49:04AM +0100, Borislav Petkov wrote:
> On Sat, Feb 03, 2024 at 07:55:52PM -0800, Ricardo Neri wrote:
> > I can set hardware_history_features from bsp_init_intel() but I still
> > need to call setup_hreset() on every CPU.
> 
> init_intel() runs on every CPU.

I see. Yes, this looks like the place to setup HRESET. Thank you for
the pointer!
diff mbox series

Patch

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 0b97bcde70c6..bce8719b47c9 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -381,6 +381,26 @@  static __always_inline void setup_umip(struct cpuinfo_x86 *c)
 	cr4_clear_bits(X86_CR4_UMIP);
 }
 
+static u32 hardware_history_features __ro_after_init;
+
+static __always_inline void setup_hreset(struct cpuinfo_x86 *c)
+{
+	if (!cpu_feature_enabled(X86_FEATURE_HRESET))
+		return;
+
+	/*
+	 * Use on all CPUs the hardware history features that the boot
+	 * CPU supports.
+	 */
+	if (c == &boot_cpu_data)
+		hardware_history_features = cpuid_ebx(0x20);
+
+	if (!hardware_history_features)
+		return;
+
+	wrmsrl(MSR_IA32_HW_HRESET_ENABLE, hardware_history_features);
+}
+
 /* These bits should not change their value after CPU init is finished. */
 static const unsigned long cr4_pinned_mask =
 	X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP |
@@ -1872,10 +1892,11 @@  static void identify_cpu(struct cpuinfo_x86 *c)
 	/* Disable the PN if appropriate */
 	squash_the_stupid_serial_number(c);
 
-	/* Set up SMEP/SMAP/UMIP */
+	/* Set up SMEP/SMAP/UMIP/HRESET */
 	setup_smep(c);
 	setup_smap(c);
 	setup_umip(c);
+	setup_hreset(c);
 
 	/* Enable FSGSBASE instructions if available. */
 	if (cpu_has(c, X86_FEATURE_FSGSBASE)) {