diff mbox

[4/8] RDMA/cxgb4: Account for unsignled SQ WRs that fails to deal with wrap

Message ID 1375803280-7916-5-git-send-email-vipul@chelsio.com (mailing list archive)
State Accepted, archived
Headers show

Commit Message

Vipul Pandya Aug. 6, 2013, 3:34 p.m. UTC 
From: Steve Wise <swise@opengridcomputing.com>

When determining how many WRs are completed with a signaled CQE,
correctly deal with queue wraps.

Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Vipul Pandya <vipul@chelsio.com>
---
 drivers/infiniband/hw/cxgb4/cq.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c
index d84b2c0..4e91168 100644
--- a/drivers/infiniband/hw/cxgb4/cq.c
+++ b/drivers/infiniband/hw/cxgb4/cq.c
@@ -611,9 +611,12 @@  proc_cqe:
 		* to the first unsignaled one, and idx points to the
 		* signaled one.  So adjust in_use based on this delta.
 		* if this is not completing any unsigned wrs, then the
-		* delta will be 0.
+		* delta will be 0. Handle wrapping also!
 		*/
-		wq->sq.in_use -= idx - wq->sq.cidx;
+		if (idx < wq->sq.cidx)
+			wq->sq.in_use -= wq->sq.size + idx - wq->sq.cidx;
+		else
+			wq->sq.in_use -= idx - wq->sq.cidx;
 		BUG_ON(wq->sq.in_use < 0 && wq->sq.in_use < wq->sq.size);
 
 		wq->sq.cidx = (uint16_t)idx;