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[6/8] RDMA/cxgb4: Always do GTS write if cidx_inc == CIDXINC_MASK.

Message ID 1375803280-7916-7-git-send-email-vipul@chelsio.com (mailing list archive)
State Accepted, archived
Headers show

Commit Message

Vipul Pandya Aug. 6, 2013, 3:34 p.m. UTC 
From: Steve Wise <swise@opengridcomputing.com>

When polling, we do a GTS update if the accumulated cidx_inc == the CQ
depth / 16.  However, if the CQ is large enough, Cq depth / 16 exceeds the size
of the field in the GTS word. So we also need to update if cidx_inc hits
CIDXINC_MASK to avoid overflowing the field.

Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Vipul Pandya <vipul@chelsio.com>
---
 drivers/infiniband/hw/cxgb4/t4.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h
index 3a6a289..1272dfe 100644
--- a/drivers/infiniband/hw/cxgb4/t4.h
+++ b/drivers/infiniband/hw/cxgb4/t4.h
@@ -531,7 +531,7 @@  static inline void t4_swcq_consume(struct t4_cq *cq)
 static inline void t4_hwcq_consume(struct t4_cq *cq)
 {
 	cq->bits_type_ts = cq->queue[cq->cidx].bits_type_ts;
-	if (++cq->cidx_inc == (cq->size >> 4)) {
+	if (++cq->cidx_inc == (cq->size >> 4) || cq->cidx_inc == CIDXINC_MASK) {
 		u32 val;
 
 		val = SEINTARM(0) | CIDXINC(cq->cidx_inc) | TIMERREG(7) |