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[rdma-core,2/3] verbs: Expose PCI atomic operations capabilities in query_device_ex

Message ID 1548590494-16684-3-git-send-email-yishaih@mellanox.com (mailing list archive)
State Not Applicable
Headers show
Series Expose PCI atomic capabilities | expand

Commit Message

Yishai Hadas Jan. 27, 2019, 12:01 p.m. UTC 
From: Michael Guralnik <michaelgur@mellanox.com>

PCI atomic operations were first introduced in PCIe Base Specification
2.1. The supported operations are swap, fetch & add and compare & swap.
Each operation can be supported in a few different operation sizes
therefore we expose the capabilities in a bitmask of supported operation
sizes per operation type.

Unlike other atomic operation modes, pci atomic operations enable an
application to perform atomic operations on local memory without
involving verbs API and without compromising the operation atomicity.

Signed-off-by: Michael Guralnik <michaelgur@mellanox.com>
Signed-off-by: Yishai Hadas <yishaih@mellanox.com>
---
 libibverbs/man/ibv_query_device_ex.3 | 17 +++++++++++++++++
 libibverbs/verbs.h                   | 17 +++++++++++++++++
 2 files changed, 34 insertions(+)
diff mbox series

Patch

diff --git a/libibverbs/man/ibv_query_device_ex.3 b/libibverbs/man/ibv_query_device_ex.3
index 2012c63..15a430d 100644
--- a/libibverbs/man/ibv_query_device_ex.3
+++ b/libibverbs/man/ibv_query_device_ex.3
@@ -36,6 +36,7 @@  uint32_t               raw_packet_caps;            /* Raw packet capabilities, u
 struct ibv_tm_caps     tm_caps;                    /* Tag matching capabilities */
 struct ibv_cq_moderation_caps  cq_mod_caps;        /* CQ moderation max capabilities */
 uint64_t     	       max_dm_size;		   /* Max Device Memory size (in bytes) available for allocation */
+struct ibv_pci_atomic_caps atomic_caps;            /* PCI atomic operations capabilities, use enum ibv_pci_atomic_op_size */
 .in -8
 };
 
@@ -107,6 +108,22 @@  struct ibv_cq_moderation_caps {
 	uint16_t max_cq_count;
 	uint16_t max_cq_period;
 };
+
+enum ibv_pci_atomic_op_size {
+.in +8
+IBV_PCI_ATOMIC_OPERATION_4_BYTE_SIZE_SUP = 1 << 0,
+IBV_PCI_ATOMIC_OPERATION_8_BYTE_SIZE_SUP = 1 << 1,
+IBV_PCI_ATOMIC_OPERATION_16_BYTE_SIZE_SUP = 1 << 2,
+.in -8
+};
+
+struct ibv_pci_atomic_caps {
+.in +8
+uint16_t fetch_add;	/* Supported sizes for an atomic fetch and add operation, use enum ibv_pci_atomic_op_size */
+uint16_t swap;		/* Supported sizes for an atomic unconditional swap operation, use enum ibv_pci_atomic_op_size */
+uint16_t compare_swap;	/* Supported sizes for an atomic compare and swap operation, use enum ibv_pci_atomic_op_size */
+.in -8
+};
 .fi
 
 Extended device capability flags (device_cap_flags_ex):
diff --git a/libibverbs/verbs.h b/libibverbs/verbs.h
index c9491a7..4cc8720 100644
--- a/libibverbs/verbs.h
+++ b/libibverbs/verbs.h
@@ -293,6 +293,22 @@  struct ibv_cq_moderation_caps {
 	uint16_t max_cq_period; /* in micro seconds */
 };
 
+enum ibv_pci_atomic_op_size {
+	IBV_PCI_ATOMIC_OPERATION_4_BYTE_SIZE_SUP = 1 << 0,
+	IBV_PCI_ATOMIC_OPERATION_8_BYTE_SIZE_SUP = 1 << 1,
+	IBV_PCI_ATOMIC_OPERATION_16_BYTE_SIZE_SUP = 1 << 2,
+};
+
+/*
+ * Bitmask for supported operation sizes
+ * Use enum ibv_pci_atomic_op_size
+ */
+struct ibv_pci_atomic_caps {
+	uint16_t fetch_add;
+	uint16_t swap;
+	uint16_t compare_swap;
+};
+
 struct ibv_device_attr_ex {
 	struct ibv_device_attr	orig_attr;
 	uint32_t		comp_mask;
@@ -308,6 +324,7 @@  struct ibv_device_attr_ex {
 	struct ibv_tm_caps	tm_caps;
 	struct ibv_cq_moderation_caps  cq_mod_caps;
 	uint64_t max_dm_size;
+	struct ibv_pci_atomic_caps pci_atomic_caps;
 };
 
 enum ibv_mtu {