diff mbox series

[for-next,2/6] RDMA/hns: Remove unsupported CMDQ mode

Message ID 1612419786-39173-3-git-send-email-liweihang@huawei.com (mailing list archive)
State Superseded
Headers show
Series RDMA/hns: Fix and refactor CMDQ related code | expand

Commit Message

Weihang Li Feb. 4, 2021, 6:23 a.m. UTC 
From: Lang Cheng <chenglang@huawei.com>

HIP08/09 only supports CMDQ in non-interrupt mode, and the firmware always
ignores the flag to indicate the mode. Therefore, remove the dead code.

Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
 drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 24 ++++++++----------------
 drivers/infiniband/hw/hns/hns_roce_hw_v2.h |  2 --
 2 files changed, 8 insertions(+), 18 deletions(-)

Comments

Weihang Li Feb. 7, 2021, 8:15 a.m. UTC | #1 
On 2021/2/7 15:52, chenglang wrote:
> 
> On 2021/2/4 14:23, Weihang Li wrote:
>> From: Lang Cheng <chenglang@huawei.com>
>>
>> HIP08/09 only supports CMDQ in non-interrupt mode, and the firmware always
>> ignores the flag to indicate the mode. Therefore, remove the dead code.
>>
>> Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
>> Signed-off-by: Lang Cheng <chenglang@huawei.com>
>> Signed-off-by: Weihang Li <liweihang@huawei.com>
>> ---
>>  drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 24 ++++++++----------------
>>  drivers/infiniband/hw/hns/hns_roce_hw_v2.h |  2 --
>>  2 files changed, 8 insertions(+), 18 deletions(-)
>>
>> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> index 7a5a41d..260c17c 100644
>> --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> @@ -1197,8 +1197,7 @@ static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc,
>>  {
>>  	memset((void *)desc, 0, sizeof(struct hns_roce_cmq_desc));
>>  	desc->opcode = cpu_to_le16(opcode);
>> -	desc->flag =
>> -		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
>> +	desc->flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
>>  	if (is_read)
>>  		desc->flag |= cpu_to_le16(HNS_ROCE_CMD_FLAG_WR);
>>  	else
>> @@ -1275,18 +1274,12 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
>>  	/* Write to hardware */
>>  	roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, csq->next_to_use);
>>  
>> -	/*
>> -	 * If the command is sync, wait for the firmware to write back,
>> -	 * if multi descriptors to be sent, use the first one to check
>> -	 */
>> -	if (le16_to_cpu(desc->flag) & HNS_ROCE_CMD_FLAG_NO_INTR) {
>> -		do {
>> -			if (hns_roce_cmq_csq_done(hr_dev))
>> -				break;
>> -			udelay(1);
>> -			timeout++;
>> -		} while (timeout < priv->cmq.tx_timeout);
>> -	}
>> +	do {
>> +		if (hns_roce_cmq_csq_done(hr_dev))
>> +			break;
>> +		udelay(1);
>> +		timeout++;
>> +	} while (timeout < priv->cmq.tx_timeout);
>>  
>>  	if (hns_roce_cmq_csq_done(hr_dev)) {
>>  		handle = 0;
>> @@ -1626,8 +1619,7 @@ static int hns_roce_set_vf_switch_param(struct hns_roce_dev *hr_dev, int vf_id)
>>  	if (ret)
>>  		return ret;
>>  
>> -	desc.flag =
>> -		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
> 
> The old firmware needs this redundant flag, it is best cleaned up after the
> firmware version is released.
> 
> Thanks.

Got it, I will drop this one from the series.

Thanks
Weihang

> 
>> +	desc.flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
>>  	desc.flag &= cpu_to_le16(~HNS_ROCE_CMD_FLAG_WR);
>>  	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LPBK_S, 1);
>>  	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LCL_LPBK_S, 0);
>> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
>> index 9f97e32..986a287 100644
>> --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
>> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
>> @@ -128,14 +128,12 @@
>>  #define HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT	1
>>  #define HNS_ROCE_CMD_FLAG_NEXT_SHIFT		2
>>  #define HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT	3
>> -#define HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT		4
>>  #define HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT	5
>>  
>>  #define HNS_ROCE_CMD_FLAG_IN		BIT(HNS_ROCE_CMD_FLAG_IN_VALID_SHIFT)
>>  #define HNS_ROCE_CMD_FLAG_OUT		BIT(HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT)
>>  #define HNS_ROCE_CMD_FLAG_NEXT		BIT(HNS_ROCE_CMD_FLAG_NEXT_SHIFT)
>>  #define HNS_ROCE_CMD_FLAG_WR		BIT(HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT)
>> -#define HNS_ROCE_CMD_FLAG_NO_INTR	BIT(HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT)
>>  #define HNS_ROCE_CMD_FLAG_ERR_INTR	BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT)
>>  
>>  #define HNS_ROCE_CMQ_DESC_NUM_S		3
Leon Romanovsky Feb. 7, 2021, 8:53 a.m. UTC | #2 
On Sun, Feb 07, 2021 at 08:15:09AM +0000, liweihang wrote:
> On 2021/2/7 15:52, chenglang wrote:
> >
> > On 2021/2/4 14:23, Weihang Li wrote:
> >> From: Lang Cheng <chenglang@huawei.com>
> >>
> >> HIP08/09 only supports CMDQ in non-interrupt mode, and the firmware always
> >> ignores the flag to indicate the mode. Therefore, remove the dead code.
> >>
> >> Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
> >> Signed-off-by: Lang Cheng <chenglang@huawei.com>
> >> Signed-off-by: Weihang Li <liweihang@huawei.com>
> >> ---
> >>  drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 24 ++++++++----------------
> >>  drivers/infiniband/hw/hns/hns_roce_hw_v2.h |  2 --
> >>  2 files changed, 8 insertions(+), 18 deletions(-)
> >>
> >> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> >> index 7a5a41d..260c17c 100644
> >> --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> >> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> >> @@ -1197,8 +1197,7 @@ static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc,
> >>  {
> >>  	memset((void *)desc, 0, sizeof(struct hns_roce_cmq_desc));
> >>  	desc->opcode = cpu_to_le16(opcode);
> >> -	desc->flag =
> >> -		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
> >> +	desc->flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
> >>  	if (is_read)
> >>  		desc->flag |= cpu_to_le16(HNS_ROCE_CMD_FLAG_WR);
> >>  	else
> >> @@ -1275,18 +1274,12 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
> >>  	/* Write to hardware */
> >>  	roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, csq->next_to_use);
> >>
> >> -	/*
> >> -	 * If the command is sync, wait for the firmware to write back,
> >> -	 * if multi descriptors to be sent, use the first one to check
> >> -	 */
> >> -	if (le16_to_cpu(desc->flag) & HNS_ROCE_CMD_FLAG_NO_INTR) {
> >> -		do {
> >> -			if (hns_roce_cmq_csq_done(hr_dev))
> >> -				break;
> >> -			udelay(1);
> >> -			timeout++;
> >> -		} while (timeout < priv->cmq.tx_timeout);
> >> -	}
> >> +	do {
> >> +		if (hns_roce_cmq_csq_done(hr_dev))
> >> +			break;
> >> +		udelay(1);
> >> +		timeout++;
> >> +	} while (timeout < priv->cmq.tx_timeout);
> >>
> >>  	if (hns_roce_cmq_csq_done(hr_dev)) {
> >>  		handle = 0;
> >> @@ -1626,8 +1619,7 @@ static int hns_roce_set_vf_switch_param(struct hns_roce_dev *hr_dev, int vf_id)
> >>  	if (ret)
> >>  		return ret;
> >>
> >> -	desc.flag =
> >> -		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
> >
> > The old firmware needs this redundant flag, it is best cleaned up after the
> > firmware version is released.
> >
> > Thanks.
>
> Got it, I will drop this one from the series.

And how will it work new kernel with old FW? Or isn't it possible and all
users must upgrade their kernel/FW at the same time?

Thanks

>
> Thanks
> Weihang
>
> >
> >> +	desc.flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
> >>  	desc.flag &= cpu_to_le16(~HNS_ROCE_CMD_FLAG_WR);
> >>  	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LPBK_S, 1);
> >>  	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LCL_LPBK_S, 0);
> >> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
> >> index 9f97e32..986a287 100644
> >> --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
> >> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
> >> @@ -128,14 +128,12 @@
> >>  #define HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT	1
> >>  #define HNS_ROCE_CMD_FLAG_NEXT_SHIFT		2
> >>  #define HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT	3
> >> -#define HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT		4
> >>  #define HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT	5
> >>
> >>  #define HNS_ROCE_CMD_FLAG_IN		BIT(HNS_ROCE_CMD_FLAG_IN_VALID_SHIFT)
> >>  #define HNS_ROCE_CMD_FLAG_OUT		BIT(HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT)
> >>  #define HNS_ROCE_CMD_FLAG_NEXT		BIT(HNS_ROCE_CMD_FLAG_NEXT_SHIFT)
> >>  #define HNS_ROCE_CMD_FLAG_WR		BIT(HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT)
> >> -#define HNS_ROCE_CMD_FLAG_NO_INTR	BIT(HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT)
> >>  #define HNS_ROCE_CMD_FLAG_ERR_INTR	BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT)
> >>
> >>  #define HNS_ROCE_CMQ_DESC_NUM_S		3
>
diff mbox series

Patch

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 7a5a41d..260c17c 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1197,8 +1197,7 @@  static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc,
 {
 	memset((void *)desc, 0, sizeof(struct hns_roce_cmq_desc));
 	desc->opcode = cpu_to_le16(opcode);
-	desc->flag =
-		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
+	desc->flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
 	if (is_read)
 		desc->flag |= cpu_to_le16(HNS_ROCE_CMD_FLAG_WR);
 	else
@@ -1275,18 +1274,12 @@  static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
 	/* Write to hardware */
 	roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, csq->next_to_use);
 
-	/*
-	 * If the command is sync, wait for the firmware to write back,
-	 * if multi descriptors to be sent, use the first one to check
-	 */
-	if (le16_to_cpu(desc->flag) & HNS_ROCE_CMD_FLAG_NO_INTR) {
-		do {
-			if (hns_roce_cmq_csq_done(hr_dev))
-				break;
-			udelay(1);
-			timeout++;
-		} while (timeout < priv->cmq.tx_timeout);
-	}
+	do {
+		if (hns_roce_cmq_csq_done(hr_dev))
+			break;
+		udelay(1);
+		timeout++;
+	} while (timeout < priv->cmq.tx_timeout);
 
 	if (hns_roce_cmq_csq_done(hr_dev)) {
 		handle = 0;
@@ -1626,8 +1619,7 @@  static int hns_roce_set_vf_switch_param(struct hns_roce_dev *hr_dev, int vf_id)
 	if (ret)
 		return ret;
 
-	desc.flag =
-		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
+	desc.flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
 	desc.flag &= cpu_to_le16(~HNS_ROCE_CMD_FLAG_WR);
 	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LPBK_S, 1);
 	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LCL_LPBK_S, 0);
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index 9f97e32..986a287 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -128,14 +128,12 @@ 
 #define HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT	1
 #define HNS_ROCE_CMD_FLAG_NEXT_SHIFT		2
 #define HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT	3
-#define HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT		4
 #define HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT	5
 
 #define HNS_ROCE_CMD_FLAG_IN		BIT(HNS_ROCE_CMD_FLAG_IN_VALID_SHIFT)
 #define HNS_ROCE_CMD_FLAG_OUT		BIT(HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT)
 #define HNS_ROCE_CMD_FLAG_NEXT		BIT(HNS_ROCE_CMD_FLAG_NEXT_SHIFT)
 #define HNS_ROCE_CMD_FLAG_WR		BIT(HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT)
-#define HNS_ROCE_CMD_FLAG_NO_INTR	BIT(HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT)
 #define HNS_ROCE_CMD_FLAG_ERR_INTR	BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT)
 
 #define HNS_ROCE_CMQ_DESC_NUM_S		3