[for-next,05/12] RDMA/hns: Adjust definition of FRMR fields

Message ID	1612517974-31867-6-git-send-email-liweihang@huawei.com (mailing list archive)
State	Superseded
Headers	show Return-Path: <linux-rdma-owner@kernel.org> From: Weihang Li <liweihang@huawei.com> To: <dledford@redhat.com>, <jgg@nvidia.com> CC: <leon@kernel.org>, <linux-rdma@vger.kernel.org>, <linuxarm@openeuler.org> Subject: [PATCH for-next 05/12] RDMA/hns: Adjust definition of FRMR fields Date: Fri, 5 Feb 2021 17:39:27 +0800 Message-ID: <1612517974-31867-6-git-send-email-liweihang@huawei.com> In-Reply-To: <1612517974-31867-1-git-send-email-liweihang@huawei.com> References: <1612517974-31867-1-git-send-email-liweihang@huawei.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk
Series	RDMA/hns: Updates for 5.12 \| expand [for-next,00/12] RDMA/hns: Updates for 5.12 [for-next,01/12] RDMA/hns: Avoid filling sgid index when modifying QP to RTR [for-next,02/12] RDMA/hns: Fix type of sq_signal_bits [for-next,03/12] RDMA/hns: Add mapped page count checking for MTR [for-next,04/12] RDMA/hns: Disable RQ inline by default [for-next,05/12] RDMA/hns: Adjust definition of FRMR fields [for-next,06/12] RDMA/hns: Skip qp_flow_control_init() for HIP09 [for-next,07/12] RDMA/hns: Replace wmb&__raw_writeq with writeq [for-next,08/12] RDMA/hns: Move HIP06 related definitions into hns_roce_hw_v1.h [for-next,09/12] RDMA/hns: Remove some magic numbers [for-next,10/12] RDMA/hns: Avoid unnecessary memset on WQEs in post_send [for-next,11/12] RDMA/hns: Remove unnecessary wrap around for EQ's consumer index [for-next,12/12] RDMA/hns: Delete redundant judgment when preparing descriptors

Message ID

1612517974-31867-6-git-send-email-liweihang@huawei.com (mailing list archive)

State

Superseded

Headers

From: Weihang Li <liweihang@huawei.com>
To: <dledford@redhat.com>, <jgg@nvidia.com>
CC: <leon@kernel.org>, <linux-rdma@vger.kernel.org>,
        <linuxarm@openeuler.org>
Subject: [PATCH for-next 05/12] RDMA/hns: Adjust definition of FRMR fields
Date: Fri, 5 Feb 2021 17:39:27 +0800
Message-ID: <1612517974-31867-6-git-send-email-liweihang@huawei.com>
In-Reply-To: <1612517974-31867-1-git-send-email-liweihang@huawei.com>
References: <1612517974-31867-1-git-send-email-liweihang@huawei.com>
MIME-Version: 1.0
Content-Type: text/plain
Precedence: bulk

Series

RDMA/hns: Updates for 5.12 | expand

Commit Message

Weihang Li Feb. 5, 2021, 9:39 a.m. UTC

From: Yixing Liu <liuyixing1@huawei.com>

The position of the FRMR-related fields has changed, change them to fit
the new design.

Signed-off-by: Yixing Liu <liuyixing1@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
 drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 26 ++++++++++++--------------
 drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 12 ++++++------
 2 files changed, 18 insertions(+), 20 deletions(-)

Comments

Jason Gunthorpe Feb. 9, 2021, 12:23 a.m. UTC | #1

On Fri, Feb 05, 2021 at 05:39:27PM +0800, Weihang Li wrote:
> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
> index f29438c..1da980c 100644
> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
> @@ -1255,15 +1255,15 @@ struct hns_roce_v2_rc_send_wqe {
>  
>  #define V2_RC_SEND_WQE_BYTE_4_INLINE_S 12
>  
> -#define V2_RC_FRMR_WQE_BYTE_4_BIND_EN_S 19
> +#define V2_RC_FRMR_WQE_BYTE_40_BIND_EN_S 10
>  
> -#define V2_RC_FRMR_WQE_BYTE_4_ATOMIC_S 20
> +#define V2_RC_FRMR_WQE_BYTE_40_ATOMIC_S 11
>  
> -#define V2_RC_FRMR_WQE_BYTE_4_RR_S 21
> +#define V2_RC_FRMR_WQE_BYTE_40_RR_S 12
>  
> -#define V2_RC_FRMR_WQE_BYTE_4_RW_S 22
> +#define V2_RC_FRMR_WQE_BYTE_40_RW_S 13
>  
> -#define V2_RC_FRMR_WQE_BYTE_4_LW_S 23
> +#define V2_RC_FRMR_WQE_BYTE_40_LW_S 14
>  
>  #define V2_RC_SEND_WQE_BYTE_4_FLAG_S 31
>  
> @@ -1280,7 +1280,7 @@ struct hns_roce_v2_rc_send_wqe {
>  
>  struct hns_roce_wqe_frmr_seg {
>  	__le32	pbl_size;
> -	__le32	mode_buf_pg_sz;
> +	__le32	byte_40;
>  };

This stuff is HW API isn't it?

I didn't see anything to negotiate compatability with existing HW?
What happens if the kernel is updated and run on old HW/FW?

If you tightly couple you still need to check and refuse to load the
driver.

Jason

Weihang Li Feb. 9, 2021, 7:56 a.m. UTC | #2

On 2021/2/9 8:24, Jason Gunthorpe wrote:
> On Fri, Feb 05, 2021 at 05:39:27PM +0800, Weihang Li wrote:
>> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
>> index f29438c..1da980c 100644
>> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
>> @@ -1255,15 +1255,15 @@ struct hns_roce_v2_rc_send_wqe {
>>  
>>  #define V2_RC_SEND_WQE_BYTE_4_INLINE_S 12
>>  
>> -#define V2_RC_FRMR_WQE_BYTE_4_BIND_EN_S 19
>> +#define V2_RC_FRMR_WQE_BYTE_40_BIND_EN_S 10
>>  
>> -#define V2_RC_FRMR_WQE_BYTE_4_ATOMIC_S 20
>> +#define V2_RC_FRMR_WQE_BYTE_40_ATOMIC_S 11
>>  
>> -#define V2_RC_FRMR_WQE_BYTE_4_RR_S 21
>> +#define V2_RC_FRMR_WQE_BYTE_40_RR_S 12
>>  
>> -#define V2_RC_FRMR_WQE_BYTE_4_RW_S 22
>> +#define V2_RC_FRMR_WQE_BYTE_40_RW_S 13
>>  
>> -#define V2_RC_FRMR_WQE_BYTE_4_LW_S 23
>> +#define V2_RC_FRMR_WQE_BYTE_40_LW_S 14
>>  
>>  #define V2_RC_SEND_WQE_BYTE_4_FLAG_S 31
>>  
>> @@ -1280,7 +1280,7 @@ struct hns_roce_v2_rc_send_wqe {
>>  
>>  struct hns_roce_wqe_frmr_seg {
>>  	__le32	pbl_size;
>> -	__le32	mode_buf_pg_sz;
>> +	__le32	byte_40;
>>  };
> 
> This stuff is HW API isn't it?
> 
> I didn't see anything to negotiate compatability with existing HW?
> What happens if the kernel is updated and run on old HW/FW?
> 
> If you tightly couple you still need to check and refuse to load the
> driver.
> 
> Jason
> 

Thank you, FRMR is not well-supported on HIP08, so we re-design it on
HIP09. I will add a check to avoid ULPs using FRMR on HIP08.

Weihang

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 3ba6783..18a8ac9 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -99,16 +99,16 @@  static void set_frmr_seg(struct hns_roce_v2_rc_send_wqe *rc_sq_wqe,
 	u64 pbl_ba;
 
 	/* use ib_access_flags */
-	roce_set_bit(rc_sq_wqe->byte_4, V2_RC_FRMR_WQE_BYTE_4_BIND_EN_S,
-		     wr->access & IB_ACCESS_MW_BIND ? 1 : 0);
-	roce_set_bit(rc_sq_wqe->byte_4, V2_RC_FRMR_WQE_BYTE_4_ATOMIC_S,
-		     wr->access & IB_ACCESS_REMOTE_ATOMIC ? 1 : 0);
-	roce_set_bit(rc_sq_wqe->byte_4, V2_RC_FRMR_WQE_BYTE_4_RR_S,
-		     wr->access & IB_ACCESS_REMOTE_READ ? 1 : 0);
-	roce_set_bit(rc_sq_wqe->byte_4, V2_RC_FRMR_WQE_BYTE_4_RW_S,
-		     wr->access & IB_ACCESS_REMOTE_WRITE ? 1 : 0);
-	roce_set_bit(rc_sq_wqe->byte_4, V2_RC_FRMR_WQE_BYTE_4_LW_S,
-		     wr->access & IB_ACCESS_LOCAL_WRITE ? 1 : 0);
+	roce_set_bit(fseg->byte_40, V2_RC_FRMR_WQE_BYTE_40_BIND_EN_S,
+		     !!(wr->access & IB_ACCESS_MW_BIND));
+	roce_set_bit(fseg->byte_40, V2_RC_FRMR_WQE_BYTE_40_ATOMIC_S,
+		     !!(wr->access & IB_ACCESS_REMOTE_ATOMIC));
+	roce_set_bit(fseg->byte_40, V2_RC_FRMR_WQE_BYTE_40_RR_S,
+		     !!(wr->access & IB_ACCESS_REMOTE_READ));
+	roce_set_bit(fseg->byte_40, V2_RC_FRMR_WQE_BYTE_40_RW_S,
+		     !!(wr->access & IB_ACCESS_REMOTE_WRITE));
+	roce_set_bit(fseg->byte_40, V2_RC_FRMR_WQE_BYTE_40_LW_S,
+		     !!(wr->access & IB_ACCESS_LOCAL_WRITE));
 
 	/* Data structure reuse may lead to confusion */
 	pbl_ba = mr->pbl_mtr.hem_cfg.root_ba;
@@ -121,12 +121,10 @@  static void set_frmr_seg(struct hns_roce_v2_rc_send_wqe *rc_sq_wqe,
 	rc_sq_wqe->va = cpu_to_le64(wr->mr->iova);
 
 	fseg->pbl_size = cpu_to_le32(mr->npages);
-	roce_set_field(fseg->mode_buf_pg_sz,
-		       V2_RC_FRMR_WQE_BYTE_40_PBL_BUF_PG_SZ_M,
+	roce_set_field(fseg->byte_40, V2_RC_FRMR_WQE_BYTE_40_PBL_BUF_PG_SZ_M,
 		       V2_RC_FRMR_WQE_BYTE_40_PBL_BUF_PG_SZ_S,
 		       to_hr_hw_page_shift(mr->pbl_mtr.hem_cfg.buf_pg_shift));
-	roce_set_bit(fseg->mode_buf_pg_sz,
-		     V2_RC_FRMR_WQE_BYTE_40_BLK_MODE_S, 0);
+	roce_set_bit(fseg->byte_40, V2_RC_FRMR_WQE_BYTE_40_BLK_MODE_S, 0);
 }
 
 static void set_atomic_seg(const struct ib_send_wr *wr,
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index f29438c..1da980c 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -1255,15 +1255,15 @@  struct hns_roce_v2_rc_send_wqe {
 
 #define V2_RC_SEND_WQE_BYTE_4_INLINE_S 12
 
-#define V2_RC_FRMR_WQE_BYTE_4_BIND_EN_S 19
+#define V2_RC_FRMR_WQE_BYTE_40_BIND_EN_S 10
 
-#define V2_RC_FRMR_WQE_BYTE_4_ATOMIC_S 20
+#define V2_RC_FRMR_WQE_BYTE_40_ATOMIC_S 11
 
-#define V2_RC_FRMR_WQE_BYTE_4_RR_S 21
+#define V2_RC_FRMR_WQE_BYTE_40_RR_S 12
 
-#define V2_RC_FRMR_WQE_BYTE_4_RW_S 22
+#define V2_RC_FRMR_WQE_BYTE_40_RW_S 13
 
-#define V2_RC_FRMR_WQE_BYTE_4_LW_S 23
+#define V2_RC_FRMR_WQE_BYTE_40_LW_S 14
 
 #define V2_RC_SEND_WQE_BYTE_4_FLAG_S 31
 
@@ -1280,7 +1280,7 @@  struct hns_roce_v2_rc_send_wqe {
 
 struct hns_roce_wqe_frmr_seg {
 	__le32	pbl_size;
-	__le32	mode_buf_pg_sz;
+	__le32	byte_40;
 };
 
 #define V2_RC_FRMR_WQE_BYTE_40_PBL_BUF_PG_SZ_S	4

[for-next,05/12] RDMA/hns: Adjust definition of FRMR fields

Commit Message

Comments

Patch