@@ -73,6 +73,7 @@ int rxe_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
void *iova_to_vaddr(struct rxe_mr *mr, u64 iova, int length);
int rxe_mr_do_atomic_op(struct rxe_mr *mr, u64 iova, int opcode,
u64 compare, u64 swap_add, u64 *orig_val);
+int rxe_mr_do_atomic_write(struct rxe_mr *mr, u64 iova, void *addr);
struct rxe_mr *lookup_mr(struct rxe_pd *pd, int access, u32 key,
enum rxe_mr_lookup_type type);
int mr_check_range(struct rxe_mr *mr, u64 iova, size_t length);
@@ -495,7 +495,7 @@ int rxe_mr_do_atomic_op(struct rxe_mr *mr, u64 iova, int opcode,
/* needs to match rxe_resp.c */
if (mr->state != RXE_MR_STATE_VALID || !vaddr)
return -EFAULT;
- if (vaddr & 7)
+ if ((uintptr_t)vaddr & 7)
return -EINVAL;
spin_lock_bh(&atomic_ops_lock);
@@ -514,6 +514,45 @@ int rxe_mr_do_atomic_op(struct rxe_mr *mr, u64 iova, int opcode,
return 0;
}
+/*
+ * Returns:
+ * 0 on success
+ * -1 for misaligned address
+ * -2 for access errors
+ */
+int rxe_mr_do_atomic_write(struct rxe_mr *mr, u64 iova, void *addr)
+{
+ u64 *vaddr;
+ u64 value;
+ unsigned int length = 8;
+
+ /* See IBA oA19-28 */
+ if (unlikely(mr->state != RXE_MR_STATE_VALID)) {
+ rxe_dbg_mr(mr, "mr not valid");
+ return -2;
+ }
+
+ /* See IBA A19.4.2 */
+ if (unlikely((uintptr_t)vaddr & 0x7 || iova & 0x7)) {
+ rxe_dbg_mr(mr, "misaligned address");
+ return -1;
+ }
+
+ vaddr = iova_to_vaddr(mr, iova, length);
+ if (unlikely(!vaddr)) {
+ rxe_dbg_mr(mr, "iova out of range");
+ return -2;
+ }
+
+ /* this makes no sense. What of payload is not 8? */
+ memcpy(&value, addr, length);
+
+ /* Do atomic write after all prior operations have completed */
+ smp_store_release(vaddr, value);
+
+ return 0;
+}
+
int advance_dma_data(struct rxe_dma_info *dma, unsigned int length)
{
struct rxe_sge *sge = &dma->sge[dma->cur_sge];
@@ -654,12 +654,12 @@ static enum resp_states atomic_reply(struct rxe_qp *qp,
}
static enum resp_states atomic_write_reply(struct rxe_qp *qp,
- struct rxe_pkt_info *pkt)
+ struct rxe_pkt_info *pkt)
{
- u64 src, *dst;
struct resp_res *res = qp->resp.res;
struct rxe_mr *mr = qp->resp.mr;
- int payload = payload_size(pkt);
+ void *addr = payload_addr(pkt);
+ int err;
if (!res) {
res = rxe_prepare_res(qp, pkt, RXE_ATOMIC_WRITE_MASK);
@@ -668,22 +668,15 @@ static enum resp_states atomic_write_reply(struct rxe_qp *qp,
if (!res->replay) {
#ifdef CONFIG_64BIT
- if (mr->state != RXE_MR_STATE_VALID)
- return RESPST_ERR_RKEY_VIOLATION;
-
- memcpy(&src, payload_addr(pkt), payload);
+ u64 iova = qp->resp.va + qp->resp.offset;
- dst = iova_to_vaddr(mr, qp->resp.va + qp->resp.offset, payload);
- /* check vaddr is 8 bytes aligned. */
- if (!dst || (uintptr_t)dst & 7)
+ err = rxe_mr_do_atomic_write(mr, iova, addr);
+ if (err == -1)
return RESPST_ERR_MISALIGNED_ATOMIC;
+ else
+ return RESPST_ERR_RKEY_VIOLATION;
- /* Do atomic write after all prior operations have completed */
- smp_store_release(dst, src);
-
- /* decrease resp.resid to zero */
- qp->resp.resid -= sizeof(payload);
-
+ qp->resp.resid -= 8;
qp->resp.msn++;
/* next expected psn, read handles this separately */
Isolate mr specific code from atomic_write_reply() in rxe_resp.c into a subroutine rxe_mr_do_atomic_write() in rxe_mr.c. Check length for atomic write operation. Make iova_to_vaddr() static. Signed-off-by: Bob Pearson <rpearsonhpe@gmail.com> --- drivers/infiniband/sw/rxe/rxe_loc.h | 1 + drivers/infiniband/sw/rxe/rxe_mr.c | 41 +++++++++++++++++++++++++++- drivers/infiniband/sw/rxe/rxe_resp.c | 25 ++++++----------- 3 files changed, 50 insertions(+), 17 deletions(-)