diff mbox series

[net-next,v2,2/2] mlx5/core: deduplicate {mlx5_,}eq_update_ci()

Message ID 20241107183054.2443218-2-csander@purestorage.com (mailing list archive)
State New
Headers show
Series [net-next,v2,1/2] mlx5/core: relax memory barrier in eq_update_ci() | expand

Commit Message

Caleb Sander Mateos Nov. 7, 2024, 6:30 p.m. UTC
The logic of eq_update_ci() is duplicated in mlx5_eq_update_ci(). The
only additional work done by mlx5_eq_update_ci() is to increment
eq->cons_index. Call eq_update_ci() from mlx5_eq_update_ci() to avoid
the duplication.

Signed-off-by: Caleb Sander Mateos <csander@purestorage.com>
---
 drivers/net/ethernet/mellanox/mlx5/core/eq.c | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

Comments

Parav Pandit Nov. 8, 2024, 10:49 a.m. UTC | #1
> From: Caleb Sander Mateos <csander@purestorage.com>
> Sent: Friday, November 8, 2024 12:01 AM
> 
> The logic of eq_update_ci() is duplicated in mlx5_eq_update_ci(). The only
> additional work done by mlx5_eq_update_ci() is to increment
> eq->cons_index. Call eq_update_ci() from mlx5_eq_update_ci() to avoid
> the duplication.
> 
> Signed-off-by: Caleb Sander Mateos <csander@purestorage.com>
> ---
>  drivers/net/ethernet/mellanox/mlx5/core/eq.c | 9 +--------
>  1 file changed, 1 insertion(+), 8 deletions(-)
> 
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> index 859dcf09b770..078029c81935 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> @@ -802,19 +802,12 @@ struct mlx5_eqe *mlx5_eq_get_eqe(struct mlx5_eq
> *eq, u32 cc)  }  EXPORT_SYMBOL(mlx5_eq_get_eqe);
> 
>  void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm)  {
> -	__be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2);
> -	u32 val;
> -
>  	eq->cons_index += cc;
> -	val = (eq->cons_index & 0xffffff) | (eq->eqn << 24);
> -
> -	__raw_writel((__force u32)cpu_to_be32(val), addr);
> -	/* We still want ordering, just not swabbing, so add a barrier */
> -	wmb();
> +	eq_update_ci(eq, arm);
>  }
>  EXPORT_SYMBOL(mlx5_eq_update_ci);
> 
>  static void comp_irq_release_pci(struct mlx5_core_dev *dev, u16 vecidx)  {
> --
> 2.45.2

Reviewed-by: Parav Pandit <parav@nvidia.com>
Tariq Toukan Nov. 11, 2024, 11:59 a.m. UTC | #2
On 08/11/2024 12:49, Parav Pandit wrote:
> 
>> From: Caleb Sander Mateos <csander@purestorage.com>
>> Sent: Friday, November 8, 2024 12:01 AM
>>
>> The logic of eq_update_ci() is duplicated in mlx5_eq_update_ci(). The only
>> additional work done by mlx5_eq_update_ci() is to increment
>> eq->cons_index. Call eq_update_ci() from mlx5_eq_update_ci() to avoid
>> the duplication.
>>
>> Signed-off-by: Caleb Sander Mateos <csander@purestorage.com>
>> ---
>>   drivers/net/ethernet/mellanox/mlx5/core/eq.c | 9 +--------
>>   1 file changed, 1 insertion(+), 8 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eq.c
>> b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
>> index 859dcf09b770..078029c81935 100644
>> --- a/drivers/net/ethernet/mellanox/mlx5/core/eq.c
>> +++ b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
>> @@ -802,19 +802,12 @@ struct mlx5_eqe *mlx5_eq_get_eqe(struct mlx5_eq
>> *eq, u32 cc)  }  EXPORT_SYMBOL(mlx5_eq_get_eqe);
>>
>>   void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm)  {
>> -	__be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2);
>> -	u32 val;
>> -
>>   	eq->cons_index += cc;
>> -	val = (eq->cons_index & 0xffffff) | (eq->eqn << 24);
>> -
>> -	__raw_writel((__force u32)cpu_to_be32(val), addr);
>> -	/* We still want ordering, just not swabbing, so add a barrier */
>> -	wmb();
>> +	eq_update_ci(eq, arm);
>>   }
>>   EXPORT_SYMBOL(mlx5_eq_update_ci);
>>
>>   static void comp_irq_release_pci(struct mlx5_core_dev *dev, u16 vecidx)  {
>> --
>> 2.45.2
> 
> Reviewed-by: Parav Pandit <parav@nvidia.com>
> 

Acked-by: Tariq Toukan <tariqt@nvidia.com>
diff mbox series

Patch

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eq.c b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
index 859dcf09b770..078029c81935 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eq.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
@@ -802,19 +802,12 @@  struct mlx5_eqe *mlx5_eq_get_eqe(struct mlx5_eq *eq, u32 cc)
 }
 EXPORT_SYMBOL(mlx5_eq_get_eqe);
 
 void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm)
 {
-	__be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2);
-	u32 val;
-
 	eq->cons_index += cc;
-	val = (eq->cons_index & 0xffffff) | (eq->eqn << 24);
-
-	__raw_writel((__force u32)cpu_to_be32(val), addr);
-	/* We still want ordering, just not swabbing, so add a barrier */
-	wmb();
+	eq_update_ci(eq, arm);
 }
 EXPORT_SYMBOL(mlx5_eq_update_ci);
 
 static void comp_irq_release_pci(struct mlx5_core_dev *dev, u16 vecidx)
 {