| Message ID | 5fd2d94a13f5742d8803c218927322257d53205c.1633512672.git.leonro@nvidia.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Jason Gunthorpe |
| Headers | show |
| Series | [rdma-rc] RDMA/mlx5: Set user priority for DCT | expand |
On Wed, Oct 06, 2021 at 12:31:53PM +0300, Leon Romanovsky wrote: > From: Patrisious Haddad <phaddad@nvidia.com> > > Currently, the driver doesn't set the PCP-based priority for DCT, > hence DCT response packets are transmitted without user priority. > > Fix it by setting user provided priority in the eth_prio field > in the DCT context, which in turn sets the value in the transmitted packet. > > Fixes: 776a3906b692 ("IB/mlx5: Add support for DC target QP") > Signed-off-by: Patrisious Haddad <phaddad@nvidia.com> > Reviewed-by: Maor Gottlieb <maorg@nvidia.com> > Signed-off-by: Leon Romanovsky <leonro@nvidia.com> > --- > drivers/infiniband/hw/mlx5/qp.c | 2 ++ > 1 file changed, 2 insertions(+) Applied to for-rc, thanks Jason
diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c index b2fca110346c..e5abbcfc1d57 100644 --- a/drivers/infiniband/hw/mlx5/qp.c +++ b/drivers/infiniband/hw/mlx5/qp.c @@ -4458,6 +4458,8 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, MLX5_SET(dctc, dctc, mtu, attr->path_mtu); MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); + if (attr->ah_attr.type == RDMA_AH_ATTR_TYPE_ROCE) + MLX5_SET(dctc, dctc, eth_prio, attr->ah_attr.sl & 0x7); err = mlx5_core_create_dct(dev, &qp->dct.mdct, qp->dct.in, MLX5_ST_SZ_BYTES(create_dct_in), out,